Process for fabricating devices having dielectric isolation util

Details Process for fabricating devices having dielectric isolation util Process for fabricating devices having dielectric isolation util

1975-04-14

1976-05-04

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

29577, 29578, 156 7, 156 17, 204 15, 2041293, 20412965, 357 40, 357 49, 357 50, H01L 2176, B23P 100, H01L 2712

Patent

active

039545237

ABSTRACT:
A process for forming complete dielectrically isolated monocrystalline silicon regions on a substrate by depositing a first epitaxial silicon layer embodying an N-type impurity on a low resistivity silicon substrate embodying a P-type impurity, forming annular P-type impurity regions in the first epitaxial layer, depositing the second epitaxial layer embodying an N-type impurity on the first epitaxial layer, forming annular P-type impurity regions in the second epitaxial layer in registry with the annular regions in the first epitaxial layer, converting the silicon substrate and the annular P-type regions in the first and second epitaxial layers into porous silicon material by an anodic treatment carried out in an aqueous solution of hydrofluoric acid, and oxidizing the porous silicon material to form silicon oxide.
A semiconductor structure having a backing substrate of silicon oxide with monocrystalline silicon islands embedded therein. A preferred embodiment includes low resistivity regions that extend through the substrate.

REFERENCES:
patent: 3386865 (1968-06-01), Doo
patent: 3442011 (1969-05-01), Strieter
patent: 3602982 (1971-09-01), Kooi
patent: 3640806 (1972-02-01), Watanabe et al.
patent: 3648125 (1972-03-01), Peltzer
patent: 3661741 (1972-05-01), Meek
Chappelow et al., "Dielectric Isolation . . . Circuit Device," I.B.M. T.D.B., Vol. 16, No. 1, June 1973, p. 31.
Peltzer et al., "Isolation Method . . . Memories," Electronics, Mar. 1, 1971, pp. 52-55.

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