Process for fabricating an optical waveguide

Details Process for fabricating an optical waveguide Process for fabricating an optical waveguide

1998-06-17

2001-07-17

Christianson, Keith (Department: 2813)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

Reexamination Certificate

active

06261857

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention is directed to a process for making a tapered waveguide interconnect for optical devices.
2. Art Background
In integrated circuits (ICs), semiconductor devices are integrated by forming metal wires in the semiconductor chip. The metal wires provide the desired electrical interconnection between the semiconductor devices. Metal wires, however, cannot be used to similarly integrate opto-electronic devices, because the operating frequency of opto-electronic devices is much higher. A waveguide structure is therefore required to integrate opto-electronic devices. Unlike the wire used to connect semiconductor devices, the waveguide interconnect must have a certain thickness, bandgap, and strain profile to provide the desired interconnection. Consequently, the process for making such waveguide interconnects must be able to provide waveguides that meet the specifications.
One current technique that is used to fabricate these interconnect waveguides is referred to Selective Area Growth (SAG). This process is described in Gibbon, M., et al., “Selective-area low-pressure MOCVD of GaInAsP and related materials on planar InP substrates,”
Semicond. Sci. Technol.,
Vol. 8, pp. 998-1010 (1993) (Gibbon et al.), which is hereby incorporated by reference. Referring to the schematic cross-section in
FIG. 1
, in the SAG process, pads
12
that define the desired configuration of the waveguide are formed on a semiconductor wafer
10
. In Gibbon et al. the substrate is an Indium-Phosphide (InP) substrate and the pads are a dielectric material such as silicon dioxide (SiO
2
)
12
. Silicon dioxide is referred to as oxide hereinafter. Vapor phase epitaxy, e.g., Metal Organic Chemical Vapor Deposition (MOCVD), is then used to deposit the waveguide material
14
, typically a semiconductor material such as Gallium-Indium-Arsenide-Phosphate (GaInAsP). The semiconductor material
14
does not grow on the portions of the substrate
10
that are covered by the oxide pads
12
.
As noted in Gibbon et al., the composition and thickness of the waveguide material
14
changes in proximity to the pads. Specifically, the growth of the waveguide material is enhanced adjacent to the oxide pads
12
. This growth enhancement effect of the oxide pads
12
on the growth of the waveguide material must be considered in placing the oxide pads on a substrate to define the substrate region on which the waveguide will be formed by SAG. The growth enhancement varies with both the dimensions of the oxide pads
12
and the distance from the oxide pads. Thus, designing an oxide mask for SAG is not simply a matter of determining the desired waveguide dimensions and forming oxide mask that defines a space corresponding to the desired waveguide dimensions. Jones, A. M., et al., “Integrated optoelectronic device by selective-area epitaxy,”
SPIE,
Vol. 2918, pp. 146-154 (1996), which is incorporated by reference herein, note the problem associated with using SAG to form a waveguide.
One example of a device that is formed using SAG is an expanded beam laser. An example of an expanded beam laser
30
is illustrated in FIG.
2
A. As illustrated in
FIG. 2A
, an expanded beam laser
30
has a first section
31
which transfers the mode of the laser beam to the underlying waveguide
32
. The underlying waveguide is slowly tapered in a second section
33
to expand the mode of the laser.
Another example of a device formed using SAG is an electroabsorption modulated laser (EML). In the EML device a laser is optically integrated with a modulator. An example of an EML structure is illustrated in FIG.
2
B. The device also has a first section
31
(the gain section) and a second section
34
(the modulator section) and a tapered section
33
. However, unlike the device illustrated in
FIG. 2A
, all of these sections make up the waveguide and all of the layers
42
,
43
and
44
are tapered. Such a device is described in Thrush, E. J., et al., “Selective and non-planar epitaxy of InP, GaInAs and GaInAsP using low pressure MOCVD,”
Journal of Crystal Growth,
Vol. 124, pp. 249-254 (1992), which is hereby incorporated by reference. In such devices, the taper section
33
is formed by SAG. The taper must be carefully controlled in order to obtain the desired mode expansion (for devices of the type shown in FIG.
2
A), or to minimize power loss while retaining desirable modulator properties (for devices of the type shown in FIG.
2
B).
As noted in Jones et al., the dimensions of the dielectric pads are used to control the thickness and the composition of the waveguide material formed on the substrate. Jones et al. models the epitaxial MOCVD deposition process and uses the model to determine the dimensions of the oxide pads and the distance between those pads to provide a waveguide with a desired thickness.
However, the Jones et al. model is a two dimensional model that cannot be used to control the profile of the waveguide. As used herein, the profile of the waveguide is the taper of the waveguide as it transitions from a first thickness (e.g. the thicker laser section) to a second thickness (e.g. the thinner mode expander section). Currently, there is no process for determining a dielectric mask configuration that will provide a waveguide with a desired profile formed by an MOCVD process. Trial and error is used to determine the mask configuration that provides the desired profile. Because the profile of the waveguide must be configured precisely in order to use the waveguide to monolithically integrate an opto-electronic device (e.g. a laser) and a fiber or waveguide, it can take many iterations over a long period of time to design a mask for growing a waveguide with a desired taper on a substrate with an MOCVD process. Accordingly, a process for designing a dielectric mask for use in fabricating a waveguide with a desired profile is desired.
SUMMARY OF THE INVENTION
The present invention is directed to a process for fabricating an opto-electronic device in which is an optoelectronic component is monolithically coupled to a waveguide with a desired profile. Examples of opto-electronic components are lasers, optical amplifiers, and modulators.
In the process, the desired waveguide configuration is provided. The waveguide has at least three portions, each with its own set of dimensions. The first portion has a first height and the second portion has a second height that is different from the first height. Typically the first portion also has a composition that is different from the composition of the second portion. In the first and second portions, it is advantageous if the height is uniform, i.e. the height does not substantially vary with either length or width. The third portion links the first portion and the second portion and thus the height of the third portion transitions from the first height at a point adjacent to the first portion to the second height at a point adjacent to the second portion. The waveguide profile, as used herein, is the relationship between the height of the waveguide and its length or width. In the first and second portions of the device, the desired profile is uniform. In the third portion, the desired profile is a desired change in the height of the waveguide as it transitions from the first height to the second height.
Components and waveguides are formed of compound semiconductor materials (e.g. silicon-germanium and III-V semiconductors). The composition is changed by varying the relative amounts of the elements that make up the compound semiconductor. Consequently, when it is stated herein that the composition of the first portion is different from the composition of the second portion, it means that the relative amounts of the elements that make up the compound semiconductor in the first portion is different than the relative amount of the elements that make up the compound semiconductor in the second portion. The process of the present invention provides a device with the desired composition as well as the desired profile.
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