Process for fabricating an integrated circuit subsurface zener d

Details Process for fabricating an integrated circuit subsurface zener d Process for fabricating an integrated circuit subsurface zener d

1978-08-14

1979-12-04

Rutledge, L. Dewayne

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

148187, 148190, 357 13, 357 40, 357 48, 357 89, H01L 2120, H01L 2990

Patent

active

041770951

ABSTRACT:
A zener diode is incorporated into a conventional integrated circuit without changing the process. The structure employed produces a diode that breaks down in a subsurface region, thus avoiding the noise and instabilities that attend surface breakdown. An isolation diffusion is employed to make the anode and an NPN transistor emitter diffusion is employed to provide the cathode. If the emitter diffusion diameter is larger than the oxide cut used to achieve isolation predeposition and is concentric therewith, the resulting zener diode will have its breakdown region confined to under the emitter diffusion. The diode action is thereby remote from surface junction breakdown effects.

REFERENCES:
patent: 3305913 (1967-02-01), Loro
patent: 3581164 (1971-05-01), Pfander et al.
patent: 3584266 (1971-06-01), Schilling
patent: 3697337 (1972-10-01), Stehlin
patent: 3765961 (1973-10-01), Mar
patent: 3770519 (1973-11-01), Wiedmann
patent: 3881179 (1975-04-01), Howard
patent: 3891480 (1975-06-01), Fulkerson
patent: 4001869 (1977-01-01), Brown
patent: 4099998 (1978-07-01), Ferro et al.
Dobkin, R. C., "On-Chip . . . Monolithic Reference Zener" Electronics, Sep. 16, 1976, pp. 106-112.

Affiliated with

Also associated with

Rating

Process for fabricating an integrated circuit subsurface zener d does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for fabricating an integrated circuit subsurface zener d, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for fabricating an integrated circuit subsurface zener d will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-90224