Process for fabricating an integrated circuit by a repetition of

Details Process for fabricating an integrated circuit by a repetition of Process for fabricating an integrated circuit by a repetition of

1991-11-08

1992-12-29

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 52, 437228, H01L 21312, H01L 21311

Patent

active

051751283

ABSTRACT:
A method for fabricating a semiconductor device comprises the steps of defining a plurality of regions on a substrate, exposing a first pattern that extends over a plurality of such regions such that the first pattern is exposed on the plurality of regions simultaneously, and exposing a plurality of second patterns that are identical in size and shape and isolated from each other, consecutively for each of the plurality of regions.

REFERENCES:
patent: 4961165 (1990-10-01), Ema
patent: 4977102 (1990-12-01), Ema
patent: 5021357 (1991-06-01), Taguchi et al.
patent: 5053351 (1991-10-01), Fazan et al.
patent: 5059548 (1991-10-01), Kim
patent: 5061651 (1991-10-01), Ino
patent: 5071781 (1991-12-01), Seo et al.

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