Process for fabricating a thin film transistor

Fishing – trapping – and vermin destroying

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437 21, 437 41, 437 62, 437 83, 437228, 357 237, H01L 2170

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active

051206676

ABSTRACT:
A TFTs fabricating process practicable at a low temperature, which includes the steps of forming a multi-layer body on a substrate, the multi-layer body including a semiconductor layer, a gate insulating layer and a lower thin layer, patterning the multi-layer body into islands, thereby removing the other portions of the multi-layer body, forming an insulating layer on the sides of the island-patterned multi-layered portion by etching at a selective ratio between the constituents of the insulating layer and the lower thin layer, forming an upper thin layer, and etching the upper and lower thin layers into upper and lower gate electrodes by use of one resist pattern.

REFERENCES:
patent: 4282543 (1981-08-01), Ihara et al.
patent: 4788157 (1988-11-01), Nakamura
patent: 4943837 (1990-07-01), Komishi et al.
patent: 4980308 (1990-12-01), Hayashi et al.
patent: 5023197 (1991-06-01), Haond et al.

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