Process for fabricating a semiconductor integrated circuit devic

Details Process for fabricating a semiconductor integrated circuit devic Process for fabricating a semiconductor integrated circuit devic

1995-06-02

1997-12-23

Tsai, H. Jey

Fishing, trapping, and vermin destroying

437919, 437193, H01L 218244

Patent

active

057007047

ABSTRACT:
A method is provided for manufacturing a semiconductor integrated circuit device which includes a capacitor element having a first electrode, a second electrode, and a dielectric film formed between said first electrode and said second electrode. In particular, the method includes the step of forming at least one of the first electrode and second electrode with a polycrystalline silicon film which is deposited over a semiconductor substrate by a CVD method and which is doped with an impurity during said deposition to decrease the resistance of the polycrystalline silicon film. The capacitor element formed by this method is particularly useful for memory cells of static random access memory devices.

REFERENCES:
patent: 4882299 (1989-11-01), Freeman et al.
patent: 5104822 (1992-04-01), Butler
patent: 5194749 (1993-03-01), Meguro et al.
patent: 5198387 (1993-03-01), Teng

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