Process for fabricating a logic structure utilizing polycrystall

Metal working – Method of mechanical manufacture – Assembling or joining

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29576E, 29576W, 29578, 29591, 148174, 148175, 148187, 148188, 357 15, 357 51, 357 59, 357 67, 357 71, 357 92, 427 84, 427 89, H01L 2120, H01L 2176

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044184689

ABSTRACT:
An integrated circuit structure and process for fabricating it are described which allow fabrication of a very compact high-speed logic gate. The structure utilizes a bipolar transistor formed in an epitaxial silicon pocket surrounded by silicon dioxide. A pair of Schottky diodes and a resistor are formed outside the epitaxial pocket on the silicon dioxide and connected to the pocket by doped polycrystalline silicon.

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patent: 4127931 (1978-12-01), Shiba
patent: 4169746 (1979-10-01), Ipri et al.
patent: 4190949 (1980-03-01), Ikeda et al.
Isaac et al., "Method for Fabricating a Self-Aligned Vertical PNP Transistor", I.B.M. Tech. Discl. Bull., vol. 22, No. 8A, Jan. 1980, pp. 3393-3396.
Berger et al., "Cross-Coupled-Transistor with Stacked Interconnection Lines", I.B.M. Tech. Discl. Bull., vol. 21, No. 12, May 1979, p. 4886.
Roesner et al., "New High Speed I.sup.2 L Structure", IEEE J. Solid-State Circuits, vol. SC-12, No. 2, Apr. 1977, pp. 114-118.
Okada et al., "New Polysilicon Process-Bipolar Device-PSA Technology", IEEE J. Solid-State Circuits, vol. SC-14, No. 2, Apr. 1979, pp. 307-311.

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