Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
1999-12-20
2001-10-23
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S057000, C438S059000, C438S073000, C438S075000, C257S233000
Reexamination Certificate
active
06306678
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a method used to fabricate an image sensor cell
(2) Description of Prior Art
Image sensor cells are usually comprised of active image sensing elements, such as photodiodes, in addition to adjacent transistor structures, such as transfer gate transistors, and reset transistors. These transistor structures, as well as additional devices, used for the control and signal circuits, in the peripheral regions of the image sensor cell, are comprised with complimentary metal oxide semiconductor, (CMOS), devices. Therefore to reduce process cost and complexity, the image sensor cell has also been fabricated using CMOS process sequences. However the quality of the photodiode element, of the image sensor cell, can be degraded if subjected to traditional CMOS process sequences. For example the insulator spacer, formed on the sides of the reset transistor structure, can damage a semiconductor surface, such as an N type element, of the photodiode, resulting in image sensor characteristics, such as low signal to noise, (S/N), ratios, as well as high dark current generation.
This invention will describe a process sequence for forming insulator spacers on the sides of gate structures, after formation of the N type element, of the photodiode, however with the N type element, protected from the spacer etch procedure, by an overlying insulator layer, the same insulator layer used to create the insulator spacers. This novel sequence results in higher S/N ratios, as well as lower dark current propagation, than counterparts in which the surface of the photodiode was subjected to damaging process sequences, such as the spacer etch procedure. Prior art, such as Merrill in U.S. Pat. No. 5,789,774, as well as Merrill, in U.S. Pat. No. 5,841,176, describe fabrication sequences for an active pixel sensor, or for image censor cells, however these prior art do not show the novel process sequence, described in this present invention, in which an N type, photodiode element is protected for damaging spacer definition procedures.
SUMMARY OF THE INVENTION
It is an object of this invention to fabricate an image sensor cell with a high S/N ratio, and low dark current generation.
It is another object of this invention to form the N type element, of the photodiode, prior to formation of insulator spacers on the sides of the gate structures, used in the image sensor cell, and on the sides of gate structures, used for CMOS devices, in peripheral regions of the cell.
It is yet another object of this invention to protect the N type element, of the photodiode, from the insulator spacer etch procedure, with an insulator shape, created from the same insulator layer that is being used for definition of the spacers.
In accordance with the present invention, a process sequence for forming a image sensor cell, in which the surface of a photodiode structure is protected from degrading CMOS processing sequences, such as insulator spacer definition, has been developed. After formation of the polysilicon gate structure, on an underlying gate insulator layer, to be used as a reset transistor structure, a lightly doped, source/drain region is formed in an area of a P type semiconductor substrate, not covered by the polysilicon gate structure. An N well region, or the N type segment, of a photodiode element, is next formed in a region of the P type semiconductor substrate, or formed in a P well region, previously created in a region of the semiconductor substrate to be used to accommodate the photodiode element. After deposition of a silicon oxide layer, a photoresist shape is formed, and used as a mask to protect the underlying silicon oxide layer from an anisotropic, reactive ion etching, (RIE), procedure, used to form silicon oxide spacers on the sides of the polysilicon gate structure, of the reset transistor structure, and used to form a silicon oxide shape, overlying the N type segment of the photodiode element. After removal of the photoresist shape, a heavily doped, N+ source/drain region, is formed in a region of the semiconductor substrate not covered by the polysilicon gate structure, not covered by the silicon oxide spacers, and not covered by the silicon oxide shape, overlying the N type segment of the photodiode element. Deposition of an interlevel dielectric, (ILD), layer, is followed by a contact hole opening made in the ILD, and in the silicon oxide layer, exposing a portion of the top surface of the N type segment of the photodiode element. Openings are also made in the ILD layer exposing a portion of the top surface of the N+ source/drain region, used for the readout region for the image sensor cell, as well as exposing a portion of the top surface of the polysilicon gate structure, of the reset transistor. Metal contact structures are then formed in these openings.
REFERENCES:
patent: 5789774 (1998-08-01), Merrill
patent: 5841176 (1998-11-01), Merrill
patent: 5904493 (1999-05-01), Lee et al.
patent: 5932873 (1999-08-01), Bergemont et al.
patent: 6177293 (2001-01-01), Netzer
Chiang An-Min
Lee Chi-Hsiang
Yang Hua-Yu
Yeh Wei-kun
Ackerman Stephen B.
Kennedy Jennifer M.
Niebling John F.
Saile George O.
Taiwan Semiconductor Manufacturing Company
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