Process for fabricating a high capacity memory cell

Details Process for fabricating a high capacity memory cell Process for fabricating a high capacity memory cell

1980-11-17

1983-04-19

Rutledge, L. Dewayne

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29571, 29578, 148191, H01L 2978

Patent

active

043801137

ABSTRACT:
A method of fabricating an array of high capacity memory cells comprises patterning a semiconductor surface to form memory cell areas; covering the memory cell areas with insulator; forming an ion layer of first conductivity type throughout the insulator; forming an ion layer of second conductivity type throughout the semiconductor surface; forming a first conductive pattern over the insulating layer to form a storage gate and to define a storage region extending to an isolation region and to define a transfer region spaced from the isolation region by the storage region; removing ions of first conductivity type from the portion of insulator above the transfer region and from other active areas; removing ions of second conductivity type from the transfer region and other active areas; diffusing ions of first conductivity type from the insulating layer to the storage region to produce in the storage region a shallow ion layer of first conductivity type and a deep ion layer of second conductivity type; and forming a second conductivity pattern over the transfer region to define a bit line region spaced from the storage region by a portion of the transfer region and to produce a transfer gate overlying the transfer region portion and also insulated from and partially overlying the storage gate.

REFERENCES:
patent: 3203840 (1965-08-01), Harris
patent: 3897625 (1975-08-01), Tihanyi et al.
patent: 4035906 (1977-06-01), Tasch et al.
patent: 4167017 (1979-09-01), Tasch, Jr. et al.
patent: 4227202 (1980-10-01), Tasch, Jr. et al.
patent: 4228445 (1980-10-01), Tasch, Jr. et al.

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