Process for fabricating a drift-type silicon radiation detector

Details Process for fabricating a drift-type silicon radiation detector Process for fabricating a drift-type silicon radiation detector

1999-09-21

2001-01-16

Bowers, Charles (Department: 2823)

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to corpuscular radiation

C438S048000, C438S141000, C438S380000, C438S473000, C438S476000, C438S514000, C438S542000

Reexamination Certificate

active

06174750

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a silicon radiation detector, and in particular to a process of fabricating a drift-type silicon radiation detector having a PN junction included therein.
BACKGROUND OF THE INVENTION
FIG. 1
shows the various steps of a conventional process of manufacturing a silicon radiation detector which includes the steps of:
(1) washing the silicon wafer (FIG.
2
a
)
(2) impurity doping (FIG.
2
b
)
(3) impurity drifting (FIG.
2
c
)
(4) lapping (the surface opposite to the doped layer) (FIG.
2
d
)
(5) metal deposition (to form a surface barrier) (FIG.
2
e
)
(6) bonding (mounting)
(7) depositing electrodes
First of all, a silicon wafer
1
is washed (FIG.
2
a
), and a diffusion layer
3
, for instance consisting of a lithium doped layer is formed on one side thereof as illustrated in FIG.
2
b.
The impurity in the diffusion layer
3
is then drifted toward the other side of the wafer
1
. However, the drift speed in the peripheral part of the wafer
1
is substantially faster than the central part thereof so that a drift layer
4
having an uneven thickness is produced as illustrated in FIG.
2
c.
The unevenness in the drift speed may be attributed to an unevenness in the distribution in the impurities in the wafer. When fabricating a wafer, a cylindrical silicon crystal is grown in a furnace, and this process involves a solidification of silicon from a liquid phase to a solid phase. The central part of the silicon crystal tends to solidify later than the peripheral part thereof. Therefore, impurities such as phosphorus and crystal defects tend to be concentrated in the central part. As a result, when the silicon crystal is sliced into wafers, the central part of each wafer contains impurities and defects more in the central part than the peripheral part. Because such impurities and defects impede the drift process, the drift speed in the peripheral part of the wafer is greater than that in the central part.
Therefore, the other side which has failed to be formed into a uniform drift layer is ground or lapped so as to expose the drift layer
4
over the entire surface as illustrated in FIG.
2
d.
Then, a surface barrier layer
5
is formed on the lapped surface as illustrated in FIG.
2
e.
In the step (3) of impurity drifting, because the drift speed in the peripheral part of the wafer is higher than that in the central part, when the impurity has reached the other side of the wafer in the peripheral part, the impurity may not have still reached the other side in the central part. Therefore, conventionally, it was necessary to carry out the step (4) of lapping the opposite surface of the wafer so that the drifted impurity may show over the entire opposite surface of the wafer.
Thus, the conventional process has the following disadvantages.
(a) The step of lapping off a substantial thickness of the substrate was required upon completion of drift.
(b) The step of depositing a metallic layer to form a surface barrier layer was required upon completion of drift. This metal deposition step requires the metal to be processed at a high temperature (of 500° C. or higher). However, because the drift layer was formed by drifting a doped layer at a temperature in the order of 150° C., the drift layer may be destroyed during such a high temperature deposition step.
(c) Because a surface barrier type diode is formed in a drift-type silicon radiation detector fabricated by such a conventional process, the device is vulnerable to an adverse environment (pressure changes, humidity and foreign particles), and may suffer degradation over time.
(d) The drift speed tends to be uneven because of the uneven distribution of the impurity in the silicon substrate, and this causes some difficulty in fabricating a large-diameter (three inches or larger), large-thickness (5 mm or larger) radiation detector.
BRIEF SUMMARY OF THE INVENTION
In view of such problems of the prior art, a primary object of the present invention is to provide a silicon radiation detector which is resistant to adverse environments.
A second object of the present invention is to provide a silicon radiation detector including a PN junction diode therein, instead of a surface barrier type diode.
A third object of the present invention is to provide a silicon radiation detector having a detection layer having a large thickness.
A fourth object of the present invention is to provide a silicon radiation detector which demonstrates a high signal to noise ratio.
According to the present invention, these and other objects can be accomplished by providing a process for fabricating a drift-type radiation detector including a PN junction, comprising the steps of: washing a semiconductor wafer of a first conductivity type; forming oxide layers on a first major surface of the semiconductor wafer and a second major surface opposite to the first major surface; removing oxide layers from target areas of the first and second major surfaces by a photo engraving process; forming a first diffusion layer in the target area of the first major surface by diffusing a first impurity having the first conductivity type; forming a second diffusion layer in the target area of the second major surface by diffusing a second impurity having a second conductivity type different from the first conductivity type; and drifting the second diffusion layer toward the first major surface so as to form a drift region extending from the second diffusion layer to the first diffusion layer, and to form a PN junction between the drift region and the first diffusion layer.
Because the first diffusion layer stops any further drifting of the second impurity, the drift layer can be uniformly formed over the entire area of the wafer without any spatial unevenness in the drift speed. Therefore, the lapping process to expose the drift layer is not required. Also, because a PN junction diode is formed at the interface between the drift layer and the first diffusion layer, the device is made highly resistant to environmental impacts. Owing to the elimination of the need to form a surface barrier metallic layer, as opposed to the conventional process, a high performance of the device can be ensured, and the fabrication process can be simplified at the same time.
For instance, when the second diffusion layer consists of a lithium doped layer formed in a silicon wafer which is lightly doped with boron, the drift process progresses as the electrons of the lithium complement the positive holes of boron. Because a boron doped layer (the first diffusion layer) having a substantially higher concentration of boron than the substrate is formed on the other side of the wafer, the drift layer apparently stops at the interface with the boron-doped layer because the complementing process takes a substantially longer period of time at the interface than in the substrate.
Typically, the semiconductor wafer of the first conductivity type consists of a silicon wafer lightly doped with boron, and the step of oxidizing the first and second major surfaces of the semiconductor wafer comprises the step of heating the semiconductor wafer in the presence of oxygen. The first impurity preferably consists of a member selected from a group consisting of boron (B), aluminum (Al), indium (In), zinc (Zn), gallium (Ga) and thallium (Ti), and the second impurity preferably consists of a member selected from a group consisting of lithium (Li), phosphorus (P), arsenic (As), antimony (Sb) and bismuth (Bi). More preferably, the first impurity consists of boron (B), and the second impurity consists of lithium (Li).
The required duration of the drift step can be computed by the following equation:
W=
(2×&mgr;
Vt
)
½
  (Eq. 1)
where W is the width (cm) of the drift region, &mgr; is the mobility of the second impurity (cm
2
/V.sec), V is the reverse bias voltage (V), and t is the drift time (sec). Thus, it is possible to fabricate the device in a highly predictable manner, and ensure a required performance without fail.


REFERENCES:
patent: 5156979

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