Process for fabricating a bipolar transistor with a self-aligned

Fishing – trapping – and vermin destroying

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437 41, 437 43, 357 33, 357 34, 148DIG11, H01L 2100, H01L 2102, H01L 21285, H01L 2972

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049803042

ABSTRACT:
A novel fabrication method is disclosed for fabricating a bipolar transistor having a digitated emitter electrode and a contiguous polysilicon region acting as a self-aligned base contact. The process substantially reduces the parasitic capacitances as well as eliminates the need for the intrinsic base region to be exposed to multiple etching, which results in the fabrication of small and reproducible base widths.
A first polysilicon layer is deposited over the surface of a semiconductor substrate and, then, implanted with base dopants, which are driven into the surface of the active region by a furnace process for forming an intrinsic base region. Emitter dopants are next implanted into the first polysilicon layer. Subsequently, a nitride layer is deposited and the digitated emitter fingers patterned by selective etching. Link-up regions for connecting the intrinsic base region and the extrinsic base regions to be formed later is formed by implanting portions of the substrate free of the emitter fingers with base dopants. Next, oxide sidewalls are formed on the edges of the emitter fingers by depositing a conformal oxide layer and anisotropically etching the oxide layer, leaving vertical portions thereof on the edges of each emitter finger. Finally, a second polysilicon layer is deposited conformally over the entire structure and anisotropically etched back in order to form a planar, contiguous region between each finger of the digitated electrode. Implanting the entire structure with base dopants forms the extrinsic base regions outside the fingers of the digitated electrode. Heating the substrate to cause base dopants from the first polysilicon layer to diffuse into the substrate creates emitter regions under the fingers of the digitated electrode.

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