Fishing – trapping – and vermin destroying
Patent
1987-10-15
1988-11-08
Ozaki, George T.
Fishing, trapping, and vermin destroying
437 33, 437162, H01L 21385, H01L 21425
Patent
active
047834226
ABSTRACT:
In a process for fabricating a semiconductor integrated circuit, a polysilicon layer deposited on the working surface of a silicon substrate is selectively oxidized and the polysilicon oxide layer is partially removed to form an opening. A chemical vapor deposition layer is formed on the entire surface and anisotropic etching of said chemical vapor deposition layer is performed to leave the chemical vapor deposition layer on the sidewall of the opening.
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OKI Electric Industry Co., Ltd.
Ozaki George T.
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