Process for exposing the peripheral area of a semiconductor wafe

Details Process for exposing the peripheral area of a semiconductor wafe Process for exposing the peripheral area of a semiconductor wafe

1996-10-02

1999-03-09

Mathews, Alan A.

Photocopying

Projection printing and copying cameras

Step and repeat

355 67, 356375, 356400, G03B 2742, G03B 2752

Patent

active

058808167

ABSTRACT:
To effect exposure of the peripheral area of a wafer to remove an unnecessary resist with a step shape in a development process with high precision and ease, even if the position has errors, in which a circuit pattern is formed on a semiconductor wafer in a preceding process, according to the invention, before exposing the unnecessary resist on a wafer outside of the area on which a pattern is formed, the position of a singular shaped area, such as an "orientation flat" or the like is determined by a unit for determining the peripheral edge area of the wafer, and the rotating carrier is driven and the wafer is rotated until the singular shaped area is positioned in a predetermined position. Furthermore, according to the invention, a unit for determining the alignment marks computes and stores the positions of predetermined alignment marks, by which positional errors in the location in which the circuit pattern is formed are corrected. Then, the rotating carrier is driven again, and fine adjustment of the position of the exposure area on the wafer is performed.

REFERENCES:
patent: 5028955 (1991-07-01), Hayashida et al.
patent: 5168021 (1992-12-01), Arai et al.
patent: 5168304 (1992-12-01), Hattori
patent: 5289263 (1994-02-01), Kiyokawa et al.
patent: 5329354 (1994-07-01), Yamamoto et al.
patent: 5361121 (1994-11-01), Hattori et al.
patent: 5420663 (1995-05-01), Nakajima et al.

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