Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Reexamination Certificate
2001-02-07
2003-03-04
Bell, Bruce F. (Department: 1741)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
C205S128000, C205S125000, C205S134000, C205S136000, C205S078000
Reexamination Certificate
active
06527935
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to an apparatus and a method for manufacturing an integrated circuit package. More specifically, the invention relates to a device and an assembly method for fabricating pin grid array packages using a pin contact mechanism.
BACKGROUND OF THE INVENTION
Many electronic devices, such as integrated circuits, use a pin grid array (PGA) package as the plug-in type package. Pin grid array packages provide for easy insertion and removal of a device that is plugged into a socket mounted in the product assembly. Pin grid array packages have a plurality of conductive pins which are used to form the leads for an electronic device package. These pins are typically plated to provide the desired electrical and mechanical characteristics of the pins, including enhanced solder ability, enhanced conductivity, and immunity to wear and corrosion.
Typically, an electroplating process is used to plate the pins. The electroplating process comprises electrically connecting the pins of the pin grid array package and subjecting the pins to a plating bath. The pins are physically contacted with an electrical conductor to electrically connect the pins to a current source. The physically contacted portion of the pin is not exposed to the plating bath because the plating solution is blocked by the contacting conductor. As a result, the method used to electrically connect the pins is critical to ensuring that the desired areas of the pins are sufficiently plated. One must carefully choose the contact spot on the pin, however, so as to plate the desired areas of the pins.
In addition, the plating bath must be kept in constant motion during electroplating. Such motion helps to prevent excessive change in the local concentration of the bath due to plate-out depletion. A corollary requirement is an unimpeded flow of plating chemical around the pins to be plated. Again, this requirement imposes restrictions on how the connection is made to the pins.
In the past, several methods have been developed to electrically connect the pins of pin grid array packages during the electroplating process. One method weaves wires between the pins, contacting the pins on alternate sides, to electrically connect the pins. Unfortunately, this is a slow method and it is prone to poor electrical connection of the pins. Furthermore, it is difficult to position the wires such that they do not contact areas of the pin that need to be plated.
A second method of electrically connecting the pins involves welding a conductive plate to the pin tips. Unfortunately, this method requires additional steps, such as aligning, welding, and removing the plate after the plating process, thereby increasing expense and time. Furthermore, the welded plate is not reusable. In another method, the pins are pressed into a conductive foil backed by a compliant member. Unfortunately, the conductive foil backing is typically a solid face. This solid face inhibits the flow of the plating bath around the pins and reduces pin plating.
Another method used for electrically connecting the pins of a pin grid array package incorporates a rigid mesh plate. This rigid plate is formed such that the pins are form-fitted into the plate, providing multiple contacts which press against the pin shank to provide electrical connection. Although this method typically improves the electrical connection of the pins over the method of weaving wires around the pins, large areas of the pins are left unplated as a result of multiple contacts to each pin. In addition, removal of the mesh plate after plating causes substantial damage to the pins, the plated surface, or both.
Related U.S. Pat. Nos. 5,459,102 and 5,580,432 issued to Shibata et al. describe a method of electrically connecting pins of an integrated circuit package by force-fitting each pin into a planar force-fit opening in a conductive jig. Using this method, the pin side surfaces are physically contacted by the force-fit opening to gain electrical connection. The edges of the force-fit opening section are resiliently deformable outward to receive and hold the pin. This flexibility is accomplished by forming vacant openings adjacent the walls of the force-fit opening.
Although this method improves reliability by assuring contact to the pins, the pins and plate surfaces are often damaged when removing the pins from the force-fit opening, which has a limited degree of flexibility and requires significant force to contact the pins. In addition, the plating jig requires a minimal thickness to maintain structural stability during plating, which increases the contact area between the force-fit opening and the pins, and thereby increases the area of the pin left unplated. Furthermore, the plating jig, which consists largely of a solid face, inhibits flow of the plating bath to the pins, which results in under plating of the pins.
The deficiencies of the use of conventional methods to provide an electrical connection to the pins of pin grid array packages during the electroplating process show that a need still exists for electrically connecting the pins on a pin grid array package that provides less physical contact, is more reliable, and is cost effective. An object of the present invention is to provide a way to electrically connect the pins of pin grid array packages during the electroplating process which electrically connects the pins with less physical contact, requires less force to insert and remove, and which is reuseable.
SUMMARY OF THE INVENTION
To achieve this and other objects, and in view of its purposes, the present invention provides an apparatus for electroplating a pin grid array device having a plurality of pins. Using the apparatus of the invention, the pins of the pin grid array device are electrically connected with less physical contact during the electroplating process. In addition, following electroplating, the apparatus of the invention reduces damage to the pin caused by removal of the pin from the apparatus after electroplating.
The present invention is an apparatus for electroplating a pin grid array device having a plurality of pins, the pins having a side surface and an extremity. The apparatus comprises a contact plate defining a plane and having a plurality of electrically conductive flexible contact fingers extending from the contact plate away from the plane of the contact plate. The contact fingers are adapted to flex when contacted by the pins.
In one embodiment, the flexible contact fingers are positioned such that each of the plurality of pins contacts one flexible contact finger at the pin extremity. In a second embodiment, the flexible contact fingers are positioned such that each of the plurality of pins contacts one flexible contact finger at the pin side surface. In a third embodiment, the flexible contact fingers are positioned such that each of the plurality of pins contacts two flexible contact fingers at the pin side surface.
The present invention also relates to a process for electroplating a plurality of pins extending from an integrated circuit package. The process comprises contacting each of the plurality of pins with a flexible contact finger extending from a single electrically conductive plate. The conductive plate defines a plane and the flexible contact fingers extend away from the plane.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
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Brandon Mark A.
Lake Arden S.
Lopergolo Emanuele F.
Sullivan, Jr. Joseph M.
Bell Bruce F.
Blecker, Esquire Ira D.
International Business Machines - Corporation
RatnerPrestia
LandOfFree
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