Fishing – trapping – and vermin destroying
Patent
1994-10-14
1995-08-08
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 52, 437 60, 437 44, 437 27, 437919, H01L 21265
Patent
active
054398355
ABSTRACT:
This invention is a process for fabricating a CMOS dynamic random access memory (DRAM) wherein a high-energy, oblique P-type implant is employed for punchthrough protection and field isolation enhancement or alternatively for punchthrough protection and as the sole field isolation implant. The process proceeds by forming P-type and N-type regions in a silicon substrate, performing an optional field isolation implant and forming field isolation regions using LOCOS or a modified LOCOS sequence, forming a gate dielectric layer, forming wordlines, depositing an offsetting dielectric layer, performing a low-dosage N-type implant in N-channel source/drain regions, forming spacers on the sidewalls of the gate electrodes, constructing cell capacitors superjacent the storage-node regions, performing a high-energy oblique implant with a P-type impurity which penetrates the spacers and field oxide layers, and performing a high-dosage N-type implant in bitline contact regions. As an option, the angle of the P-type oblique implant is varied through a given range to create an anti-punchthrough halo having a graded density. As a further option, a lower energy oblique implant may be performed with an N-type implant to create a graded junction for bitline junction region.
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Gurley Lynne A.
Hearn Brian E.
Micron Semiconductor Inc.
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