Process for controlling the impedance of an output...

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override

Reexamination Certificate

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C327S112000, C326S030000

Reexamination Certificate

active

06879205

ABSTRACT:
An output buffer includes a pair of main complimentary MOS transistors connected to at least one additional pair of complementary MOS transistors connected in parallel to the pair of main transistors by means of a pair of switches controlled by a numeric word for activating or not activating the additional pair of transistors. A control circuit delivers the numeric word which represents the conductivity of the pair of main transistors included in the output buffer. The additional transistors are sized in such a way that when they are activated, the equivalent impedance of the output buffer is approximately constant.

REFERENCES:
patent: 6127857 (2000-10-01), Ogawa et al.
patent: 6194913 (2001-02-01), Verkinderen et al.
patent: 6225844 (2001-05-01), Fujiwara
patent: 6310519 (2001-10-01), Ross
patent: 6313659 (2001-11-01), Bosnyak et al.
patent: 6326821 (2001-12-01), Gabara
patent: 6351149 (2002-02-01), Miyabe
patent: 6642742 (2003-11-01), Loyer
patent: 6759868 (2004-07-01), Helt et al.
patent: 20020003441 (2002-01-01), Steensgaard-Madsen
patent: 1 020 989 (2000-07-01), None
French Search Report, FA 617687/FR 0205005, dated Mar. 19, 2003.

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