Process for automatic pattern evaluation with the aid of a rapid

Details Process for automatic pattern evaluation with the aid of a rapid Process for automatic pattern evaluation with the aid of a rapid

1979-03-26

1981-03-03

Boudreau, Leo H.

Communications: electrical

Digital comparator systems

364515, 364725, G06K 956

Patent

active

042543991

ABSTRACT:
A circuit is described which makes use of a mathematical transformation based solely on AND and OR connections for the purpose of recognizing patterns, and a process for localizing this pattern within a zone or range. By means of the direct connection of AND and OR gates, a completely parallel processing of each individual bit is achieved in the arithmetic and logic unit so implemented, which signifies a fraction of the processing time as compared to full adders. Simultaneously the equipment is capable of recognizing a specific pattern (object) from a multitude of mutually nested structures (neighborhood) and to localize it by a subsequent procedure.

REFERENCES:
patent: 3597731 (1971-08-01), Reitboeck et al.
patent: 3701095 (1972-10-01), Yamaguchi et al.
patent: 3879605 (1975-04-01), Carl et al.
patent: 4005385 (1977-01-01), Joynson et al.
patent: 4167728 (1979-09-01), Sternberg

Affiliated with

Also associated with

Rating

Process for automatic pattern evaluation with the aid of a rapid does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for automatic pattern evaluation with the aid of a rapid, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for automatic pattern evaluation with the aid of a rapid will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-82114