Process for arranging printed conductors on the surface of semic

Details Process for arranging printed conductors on the surface of semic Process for arranging printed conductors on the surface of semic

1996-08-13

1998-04-07

Dutton, Brian

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Interconnecting plural devices on semiconductor substrate

H01L 2100

Patent

active

057364265

ABSTRACT:
In a process for arranging printed conductors on the surface of a semiconductor component, printed conductors connect wire ranges that are designed as polygons. The polygons are composed of individual edge points. With regard to each of these edge points, it is determined whether it can be connected by a printed conductor running parallel to the coordinate system or diagonally to the coordinate system. Additional edge points may also have a "not connectable" status.

REFERENCES:
patent: 4158072 (1979-06-01), Bohg et al.
Elsevier, Integration, the VLSI Journal 12 (1991), 189-210.

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