Process for and structure of high density VLSI circuits, having

Details Process for and structure of high density VLSI circuits, having Process for and structure of high density VLSI circuits, having

1982-07-12

1984-10-23

Saba, William G.

Metal working

Method of mechanical manufacture

Assembling or joining

29577C, 29578, 29591, 148187, 148188, 156643, 156653, 156657, 357 23, 357 41, 357 45, 357 59, H01L 21225, H01L 21441

Patent

active

044779623

ABSTRACT:
A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices. The use of materials in successive layers having different etch characteristics permits selective oxidation of desired portions only of the structure without need for masking and removal of selected material from desired locations by batch removal processes again without use of masking. There results VLSI circuits having increased density and reliability.

REFERENCES:
patent: 3967981 (1976-07-01), Yamazaki
patent: 4179311 (1979-12-01), Athanas
patent: 4180826 (1979-12-01), Shappir
patent: 4210993 (1980-07-01), Sunami
patent: 4224733 (1980-09-01), Spadea

Affiliated with

Also associated with

Rating

Process for and structure of high density VLSI circuits, having does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for and structure of high density VLSI circuits, having , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for and structure of high density VLSI circuits, having will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1592107