Process for aligning diffusion masks with respect to isolating w

Metal working – Method of mechanical manufacture – Assembling or joining

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29576B, 148175, 148187, 2041293, H01L 2122

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active

043695612

ABSTRACT:
A process in which P.sup.+ impurities are implanted in a P silicon substrate at the periphery of N.sup.+ buried layers, prior to growing an N epitaxial layer. Then an upward diffusion of the P.sup.+ impurities is caused up to the surface of the wafer in order to form insulation walls insulating separate N coffers. An anodization followed with an oxidation transforms those P walls into silica walls and makes their upper surface visible.

REFERENCES:
patent: 3713908 (1973-01-01), Agusta et al.
patent: 3846192 (1974-11-01), Murrmann
patent: 3919060 (1975-11-01), Pogge et al.
patent: 3954523 (1976-05-01), Magdo et al.
patent: 3980507 (1976-09-01), Carley et al.
patent: 4016017 (1977-04-01), Aboat et al.
IBM Technical Disclosure Bulletin, vol. 20, No. 6, Nov. 1977, New York (US), C. H. Lee, "Self-Aligning Subcollector and Isolation Regions in a Semi-Conductor Transistor", pp. 2233-2234.

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