Process control based upon a metrology delay

Details Process control based upon a metrology delay Process control based upon a metrology delay

2003-01-06

2004-12-21

Picard, Leo (Department: 2125)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C700S108000, C700S109000, C700S110000

Reexamination Certificate

active

06834213

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for performing process control based upon a delay related to metrology data.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed across a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer that may be composed of a variety of different materials may be formed across a semiconductor wafer. Thereafter, a patterned layer of photoresist may be formed across the process layer using known photolithography techniques. Typically, an etch process is then performed across the process layer using the patterned layer of photoresist as a mask. This etching process results in the formation of various features or objects in the process layer. Such features may be used as, for example, a gate electrode structure for transistors. Many times, trench isolation structures are also formed across the substrate of the semiconductor wafer to isolate electrical areas across a semiconductor wafer. One example of an isolation structure that can be used is a shallow trench isolation (STI) structure.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1
illustrates a typical semiconductor wafer
105
. The semiconductor wafer
105
typically includes a plurality of individual semiconductor die
103
arranged in a grid
150
. Using known photolithography processes and equipment, a patterned layer of photoresist may be formed across one or more process layers that are to be patterned. As part of the photolithography process, an exposure process is typically performed by a stepper on approximately one to four die
103
locations at a time, depending on the specific photomask employed. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed on the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features or opening-type features that are to be replicated in an underlying process layer.
Turning now to
FIG. 2
, a block diagram representation of a typical prior art process flow is illustrated. A manufacturing system may process a number of semiconductor wafers
105
within a batch/lot (block
210
). Upon processing semiconductor wafers
105
, the manufacturing system may acquire metrology data relating to the processed wafers
105
(block
220
). The manufacturing system may then analyze the metrology data and use such analysis to calculate and perform control adjustments (block
230
). Many times, there may be an appreciable delay from the time a semiconductor wafer
105
is processed to the time metrology data is acquired and/or analyzed. Upon analysis of the metrology data, the manufacturing system may calculate control adjustments based upon the analysis of the metrology data (block
240
). Based upon this calculation, the manufacturing system may then perform control adjustments to subsequent processes (block
250
).
Among the problems associated with the current methodology includes the fact that there may be a delay in the acquisition and/or analysis of the metrology data after a wafer
105
is processed. Therefore, by the time control adjustments are made based upon the metrology data, additional processes have been performed by a processing tool that produced the initial set of processed semiconductor wafers
105
. Hence, disturbances and other process conditions may change the state/condition of the processing tool, thereby making the calculated adjustments based upon the acquired metrology data inaccurate and/or outmoded. The tool health, the disturbances experienced by the processing tool, and/or the like, may affect the validity of the calculated process adjustments. Performing feedback or feed-forward adjustments based upon outmoded metrology data analysis may cause significant errors, which may result in inferiorly processed semiconductor wafers
105
.
The present invention is directed to overcoming, or at least reducing, the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method is provided for performing process control based upon a metrology delay. A process step is performed upon a first workpiece. Metrology data related to the first workpiece is acquired. A control adjustment based upon the metrology data is determined. A magnitude of the control adjustment is modified based upon a time period. The time period is defined by a first time frame relating to processing the first workpiece and a second time frame relating to acquiring metrology data related to the first workpiece.
In another aspect of the present invention, a system is provided for performing process control based upon a metrology delay. The system includes a processing tool to process a plurality of workpieces and a metrology tool to acquire metrology data. The system also includes a process controller operatively coupled to the processing tool and to the metrology tool. The process controller is adapted to determine a control adjustment based upon the metrology data and modify a magnitude of the control adjustment based upon a time period. The time period is defined by a first time frame relating to processing the workpiece and a second time frame relating to acquiring metrology data related to the workpiece.
In another aspect of the present invention, an apparatus is provided for performing process control based upon a metrology delay. The apparatus includes a process controller adapted to determine a control adjustment based upon metrology data relating to processing a workpiece. The process controller is also adapted to determine a control adjustment based upon the metrology data and modify a magnitude of the control adjustment based upon a time period. The time period is defined by a first time frame relating to processing the workpiece and a second time frame relating to acquiring metrology data related to the workpiece.
In yet another aspect of the present invention, a computer readable program storage device encoded with instructions is provided for performing process control based upon a metrology delay. The computer readable program storage device encoded

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