Boots – shoes – and leggings
Patent
1990-05-29
1992-10-20
Lee, Thomas C.
Boots, shoes, and leggings
364DIG1, 3642287, 3642295, 3642306, G06F 1576
Patent
active
051577852
ABSTRACT:
A multi-dimensional processor cell and processor array with massively parallel input/output includes a processor array having a plurality of processor cells interconnected to form an N-dimensional array. The system includes a first group of processor cells having 2N dimensionally adjacent processor cells. At least one input/output device is connected to a surplus data signal port of a second group of processor cells each having fewer than 2N dimensionally adjacent processor cells, for providing massively parallel input/output between the multi-dimensional processor array and the input/output device. The processor system also includes a front end processor for providing processor array instructions in response to application programs running on the front end processor. A processor cell controller, responsive to the processor array commands, broadcasts a sequence of processor cell instructions to all of the processor cells of the multi-dimensional processor array.
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"The Third Dimension", The 3-D Computer Demonstrates the Feasibility of the Wafer Approach, Byte, Nov. 1988, pp. 311-320.
Fiorentino Richard D.
Jackson James H.
LaForest Mark R.
Lee Ming-Chih
Ellis Richard Lee
Lee Thomas C.
Wavetracer, Inc.
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