Process, apparatus, and system for two-dimensional caching to pe

Details Process, apparatus, and system for two-dimensional caching to pe Process, apparatus, and system for two-dimensional caching to pe

1994-06-20

1996-07-23

Ramirez, Ellis B.

Boots, shoes, and leggings

G06F 1700

Patent

active

055396640

ABSTRACT:
A subset of signals corresponding to a two-dimensional set of signals is stored into an area of computer memory smaller than the two-dimensional set for processing. Additional signals are sequentially stored in the computer memory area and processed until the entire set of signals has been processed. In a preferred embodiment, motion estimation processing is performed by sequentially transmitting video signals corresponding to portions of a search region of a previous frame from off-chip memory and storing the video signals to on-chip memory for comparison with a reference block of a current frame. The invention provides reduced computer memory usage, reduced signal transfer, and more uniform signal transfer in computer-implemented processing, such as motion estimation processing, that involves two-dimensional caching.

REFERENCES:
patent: 4491836 (1985-01-01), Collmeyer et al.
patent: 5185819 (1993-02-01), Ng et al.
patent: 5212742 (1993-05-01), Normile et al.
patent: 5379393 (1995-01-01), Yang

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