Process and means for selftest of RAMs in an electronic device

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G01F 1100

Patent

active

050365169

ABSTRACT:
A method of self-testing RAMs in an electronic device such as a computer in which the cell or cells to be tested are determined by an analysis of the current instruction as well as by the use of instruction and address information of instructions whose future execution and operation can be reasonably predicted. The testing of the current cells under test therefore occurs on a non-interference basis and only when the CPU or the peripheral devices do not require RAM access.

REFERENCES:
patent: 4583222 (1986-04-01), Fossum
patent: 4622668 (1986-11-01), Dancker

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