Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2000-08-28
2004-06-08
Nguyen, Ha Tran (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S110000, C438S113000, C438S118000
Reexamination Certificate
active
06746896
ABSTRACT:
FIELD OF THE INVENTION
This present invention is concerned with a novel process and its required materials in building low-cost flip-hip solder interconnect structures. The novel process involves two fluxable materials, fluxable wafer-level compressive-flow underfill material (WLCFLU) and fluxable tacky film, and applies these two materials on a wafer level. The two materials can provide sufficient fluxing capability during solder reflow and significant improvement of the fatigue life of the formed solder interconnects after fully cure. Therefore, this present invention provides a novel inexpensive surface mount technology (SMT) facility transparent process and polymeric materials suitable for underfilling processes in current industrial production of flip-chip solder interconnect structure for joining semiconductor devices to substrates that have improved fatigue life, and other applications where low-cost, high production efficiency, and high reliability are needed.
BACKGROUND OF THE INVENTION
The rapid advances of IC fabrication technology and the accelerated growth of the market for faster, smaller, yet less expensive products continue to pose challenges in IC packaging technology. As an ultimate solution for this trend, flip-chip technology on organic substrate has been invented, developed, and practiced for more than ten years. Underfill technology is one of the keys to the success of the low-cost flip-chip on organic board technology. The conventional underfill technology has relied on capillary flow and has been developed and practiced for some time. However, this conventional underfill technology needs separate flux dispensing, solder bump reflow, flux cleaning, underfill dispensing and flow, and off-line underfill curing steps. As such, the conventional underfilling process is tedious and expensive and not transparent to the SMT facilities. Recently, a more promising underfill technology called no-flow underfill technology has been invented and under development. The key to the success of the no-flow underfill technology lies in the availability of successful no-flow underfill materials. Currently available no-flow (compressive-flow) underfill materials can not include silica fillers since the addition of silica filler significantly reduces electrically conductive joint interconnection yield during reflow and underfill cure. As such, the cured no-flow underfill materials have higher CTE value (>70 ppm/° C.) and can not provide the desired enhancement of the joint fatigue life during reliability test, especially for larger chips and finer bump size. This has become the toughest technical barrier in developing and applying no-flow underfill technology. At the same time, the no-flow underfill technology still needs separate underfill dispensing step on an individual device and therefore can not fully take the advantages of the matured SMT technology and facility.
Our fundamental research further indicates the following mechanism that the addition of silica filler significantly reduces the solder interconnection yield. As shown in FIGS.
1
(
a
) and (
b
), silica particles in the no-flow material are entrapped in-between the solder bumps and bond pads, such as copper bond pads, and therefore eliminates the opportunity for solder bumps to contact the bond pads during the entire reflow process. However, as shown in FIG.
1
(
c
), once a solder bump is allowed to contact a bond pad during reflow process, the gravity and surface tension of solder melt can displace away the nearby silica filled underfill material and wet the bond pad. Therefore, a practical way to avoid this technical barrier is to guarantee the opportunity for every solder bump to contact its corresponding bond pad during reflow process.
The process presented in this patent is called wafer-level compressive-flow underfill (WLCFU) process and is intended to ensure satisfactory interconnection yield while exploiting silica filled no-flow underfill materials and making no-flow underfill technology totally SMT facility transparent. By using the materials describe herein, the process can guarantee the opportunity for every solder bumps to contact its corresponding bond pad during reflow process in using silica filled no-flow underfill materials.
SUMMARY OF THE INVENTION
The object of the invention is to provide a novel low-cost SMT facility transparent underfilling process by applying solvent-containing (coated at room temperature coating) or solvent-free fluxing WLCFU material (coated at elevated temperature at which the WLCFU material is melted) on an entire bumped wafer with controlled quantity so that the thickness of the solidified WLCFU layer is less than the bump height, solidifying the WLCFU material by solvent removal or simply cooling down, dicing the solid WLCFU material coated wafer into individual chips, covering the top of the bumps with a tacky film, mounting the WLCFU and tacky film coated individual chips to substrates, and reflowing the solder bumps and curing the WLCFU material and tacky film simultaneously. In some cases, post-cure of the WLCFU material and tacky film may be necessary to obtain full material properties of the WLCFU and tacky film.
The further objective of the invention is to provide an inexpensive fluxing epoxy based polymeric composition/formulation for WLCFU material application. The polymeric composition/formulation has curing peak temperature ranging from 160° C. to 350° C., which allows many reflow profiles for different solder bump materials with their melting point ranging from 150° C. to 350° C. Additionally, the cured composition/formulation has high enough (>60° C.) glass transition temperature (Tg), low enough coefficient of thermal expansion (CTE) (20-50 ppm/° C.), and excellent mechanical and physical properties.
Another further objective of the invention is to provide an inexpensive fluxing epoxy based polymeric composition/formulation for the tacky film application. The polymeric composition/formulation has curing peak temperature ranging from 160° C. to 350° C., which allows many reflow profiles for different solder bump materials with their melting point ranging from 150° C. to 350° C. Additionally, the cured composition/formulation has high enough (>125° C.) glass transition temperature (Tg), reasonable CTE (<80 ppm/° C., but prefer 20-40 ppm/° C.), and excellent mechanical and physical properties.
The advantages that the novel underfilling process (WLCFU process) has over other underfilling process are as follows: (1) Higher underfilling efficiency is obtained since the underfill material is applied on an entire bumped-wafer instead of each individual chip. (2) The process is SMT facility transparent since the fluxing WLCFU material and tacky film has been already applied on chips and no underfill dispensing machine is needed. (3) High interconnection yield is guaranteed since the fluxing tacky film provides the opportunity for each solder bump to contact its corresponding bond pad during solder bump reflow. (4) High reliability is obtained since the WLCFU material is loaded with silica filler and therefore has desired low CTE value.
The solvent-containing or solvent-free WLCFU material can be solidified by solvent removal or simply cooling down. The WLCFU material is composed of some or all of the following components: (a) a cycloaliphatic epoxy resin, a bisphenol A epoxy resin, a bisphenol F epoxy resin, an epoxy novolac resin, a biphenyl epoxy resin, a naphthalene epoxy resin, a dicyclopentadiene-phenol epoxy resin, a reactive epoxy diluent, and the mixture thereof; (b) an organic curing hardener selected from the group consisting of aromatic amimes, carboxylic acid anhydride, imidazole and its derivatives, and phenolic resins; (c) a latent curing catalyst selected from the group consisting of tertiary amines, tertiary phosphines, imidazole and its derivatives, imidazolium salts, metal chelates, oniumm salts, quaternary phosphonium compounds, 1,8-diazacyclo[5.4.0]undex-7-ene, and the mixture thereof; (d) a fluxing agent selected fro
Shi Song-Hua
Wong Ching-Ping
Deveau Todd
Georgia Tech Research Corp.
Nguyen Ha Tran
Thomas Kayden Horstemeyer & Risley LLP
Vorndran Charles
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