Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2005-02-22
2005-02-22
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
With measuring or testing
C438S692000, C438S745000
Reexamination Certificate
active
06858449
ABSTRACT:
A process for abrasive machining of surfaces of semiconductor wafers, in particular during the production of electronic memory elements, is described. In the process, a topography of the surfaces of a plurality of wafers is planarized by an at least partially mechanical route. In a further process step which takes place at a later stage, further material is removed from the planarization surfaces by the action of a liquid, chemical composition (etchback). After the planarization step and before the etchback step, a layer thickness measurement of the planarized layer is carried. The method is distinguished by the fact that the measurement results of the layer thickness measurement are used as the basis for the automatic selection or formulation of one of a plurality of chemical compositions and/or the time of action of a selected or formulated chemical composition for carrying out the etchback step.
REFERENCES:
patent: 5486129 (1996-01-01), Sandhu et al.
patent: 6242352 (2001-06-01), Chen et al.
patent: WO 0025984 (2000-05-01), None
Hollatz Mark
Roemer Andreas
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Norton Nadine G.
Stemer Werner H.
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