Process and circuit layout for using an independent capacitor fo

Electrical transmission or interconnection systems – Plural supply circuits or sources – One source floats across or compensates for other source

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307 44, 307125, 320140, H02J 900

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active

060971096

ABSTRACT:
Process and circuit layout for using an independent capacitor for the momentary retention of an output voltage when an input voltage is lost. To facilitate a reduction in capacitance in independent circuits of this type at a constant amount of charge, the input voltage is transformed by a DC/DC up converter to a higher capacitor voltage, which is stored in the independent capacitor and the capacitor voltage is transformed by a DC/DC down converter to the output voltage for the load element, which is less than the capacitor voltage. As the DC/DC down converter can utilize capacitor voltages until the output voltage is reached, the residual voltage remaining in the independent capacitor (C) is no longer used. The independent time interval is correspondingly short. According to the invention, the capacitor is disconnected from the output of the DC/DC up-converter and connected to its input when the input voltage is less than a reference voltage. In the situation while the capacitor voltage is connected to the input of the DC/DC up converter, this converter can step-up the capacitor voltage, which drops during the independent time interval, and retain a virtually constant voltage at the output, which the DC/DC down converter then transforms to the output voltage. The independent capacitor can discharge more deeply and the independent time interval can be perceptibly extended. The process and circuit layout are particularly suitable for supplying electronic assemblies in vehicles, as these start from a relatively low input voltage, which is particularly advantageous for the use of DC/DC converters.

REFERENCES:
patent: 3778634 (1973-12-01), Hanrihan
patent: 5247205 (1993-09-01), Mototani et al.
patent: 5347164 (1994-09-01), Yeh
patent: 5585677 (1996-12-01), Cheon et al.
patent: 5721481 (1998-02-01), Narita et al.

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