Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-11-04
2002-06-11
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S1540PB, C702S058000
Reexamination Certificate
active
06404206
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a process and a circuit arrangement for selecting at least one measuring parameter for testing a solder joint to detect faults therein.
The quality of solder joints on printed circuit boards can be checked for defects by means of X-rays. In the process, solder-joint-specific quality information is formed, either the information “solder joint defect-free” or the information “solder joint defective” being formed for each solder joint. This information is printed out with reference to printed circuit boards, this print-out, together with the associated printed circuit board, being supplied to a repair workstation. There, the printed circuit boards which have at least one solder joint for which the information “solder joint defective” was formed is subjected to subsequent treatment, the allegedly defective solder joint being checked visually. If the result is that the solder joint is actually defective, the contact point having the original defective solder joint is re-soldered. A test is then carried out again to see whether this solder joint is now defect-free. These operations are noted in a report, which, if necessary, is available for statistical evaluation.
EP 0 236 001 B1 has already disclosed a process and a device for measuring structural properties of selected regions of a manufactured printed circuit board having solder joints provided thereon. The device has an X-ray device for generating an X-ray beam, an imaging device for registering the X-rays transmitted through the printed circuit board in order to generate a corresponding electronic image, a processing device for converting the electronic image into an image encoded in accordance with a grey scale, and a computing device which carries out measurements on the image that has been encoded in accordance with a grey scale on the basis of measuring algorithms which are selected from a data library and which relate to predefinable electronic standard components and arrangements and to specific types of solder-joint defect that are associated with these (including “solder ball”, “excess solder”, “cold solder joint”). The computing device also generates an output signal, which corresponds to a change in the measurements of the image encoded in accordance with a grey scale from predetermined measuring standards, which, for their part, correspond to desired structural properties, which are contained in the library.
Testing of solder joints for freedom from faults can be performed in such a way that a user of a testing device effects the measurement of a plurality of reference solder joints by means of X-rays in respect to one or more measuring parameters. These measuring parameters define particular single aspects of the solder joints, for example the longitudinal dimensions of the solder joints, the lateral dimensions of the solder joints, the valley width of a cross-section of a solder joint and a difference in height between vertex points and valley points of the solder joints. The measurement of reference solder joints by means of X-rays generates information designating grey values of the solder joints. Examples for such information are shown in the lower parts of
FIGS. 2
to
5
. The information generated by the measurement provides reference values for subsequent testing of solder joints. In conventional systems however subsequent testing of solder joints leads to a large extent to results which are objectively wrong: on the one hand solder joints which are evaluated as free of faults are in fact faulty, on the other hand solder joints which are evaluated as faulty are in fact free of faults.
A solder joint inspection system is known from PARK J S ET AL: A SOLDER JOINT INSPECTION SYSTEM FOR AUTOMATED PRINTED CIRCUIT BOARD MANUFACTURING, PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON ROBOTICS AND AUTOMATION, CINCINNATI, MAY 13-18, 1990, vol. 2, May 13, 1990, pages 1290-1295, XP000143745 INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS. In the known solder joint system four frames of solder joint images are used and 15 features are extracted from the images to catagorize the most important seven classes of solder joint defects.
SUMMARY OF THE INVENTION
On the basis of this prior art, the object of the invention is to specify a process and a circuit arrangement of the type mentioned at the beginning, which reduces the probability of the occurrence of defective results in the testing of solder joints.
According to the invention, this object is achieved by a process and a circuit arrangement in which measurement information of fault-free reference solder joints of a predefinable type is correlated with measurement information of at least one faulty reference solder joint of the same type. Based on this correlation measuring parameters are selected for testing solder joints of the same type. Measuring parameters are selected which facilitate the detection of a particular type of solder joint fault. The use of the selected measuring parameters leads to test results, which have a high probability of being correct. This on the one hand avoids solder joints which are in fact fault-free being judged incorrectly as faulty, rejected and subjected to a repair which is not in fact necessary. On the other hand it avoids solder joints which actually are faulty being judged fault-free and causing non-function when installed in electronic systems.
In a further advantageous embodiment of the process according to the invention, a solder joint when tested is judged to be fault-fee if the measuring parameter value formed in the test is of at least the same size as a second threshold specific to a measuring parameter which is smaller than a first threshold specific to a measuring parameter by a threshold value deviation specific to a measuring parameter. Thereby the amount of solder joints which would otherwise be judged faulty but which are in fact fault-free and would correspondingly be judged fault-free is increased.
In yet a further advantageous embodiment of the process according to the invention, the solder joint is tested for the extent of a contact area formed between the solder material and contact element. The extent of the contact area formed between the solder material and contact element is compared with a predefinable contact-area reference value and the solder joint is judged to be a fault-free solder joint or to be a faulty solder joint as a function of the result of the comparison.
This embodiment of the process according to the invention can be carried out using relatively little data processing capacity and with a relatively small number of measurements of reference solder joints since this embodiment of the process according to the invention requires only a few measuring parameters. It merely requires at least a first measuring parameter by means of which a piece of information is generated which indicates a probability of, e.g., at least 50% for the existence of a galvanic contact between solder material and contact element as well as second measuring parameters by means of which a piece of information is generated which defines the magnitude of the contact area. For example the extent of the contact area can be determined precisely enough by means of a measuring parameter, which designates the longitudinal extent of the solder joint, and by means of a further measuring parameter, which designates the lateral extent of the solder joint.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.
REFERENCES:
patent: 5105149 (1992-04-01), Tokura
patent: 5118192 (1992-06-01), Chen et al.
patent: 5291535 (1994-03-01), Baker et al.
patent: 5493594 (1996-02-01), Hamada et al.
patent: 5495424 (1996-02-01), Tokura
patent: 6023663 (2000-02-01), Kim
patent: 0236001 (1987-09-01), None
patent: 433803 (1991-06-01), None
patent: WO 97/17605 (1997-05-01), None
Publication No. XP 000179243, Driels, et al. “Automatic Defect Classi
Crowell & Moring LLP
Hamdan Wasseem H.
Macrotron Process Technologies GmbH
Metjahic Safet
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