Radiant energy – Irradiation of objects or material – Irradiation of semiconductor devices
Patent
1992-05-07
1995-01-24
Berman, Jack I.
Radiant energy
Irradiation of objects or material
Irradiation of semiconductor devices
2504911, H01J 37304
Patent
active
053844645
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention concerns a microlithography process for the realization of superficial submicrometric structures on a wafer type substrate, and a device using it.
2. Discussion of Background Information
The manufacturing process of integrated circuits, and especially very large scale integration circuits (also called VLSI), includes a series of phases aiming to obtain complex etched structures on a wafer, namely: dioxide. ultraviolet light for example, an electron beam or an X-ray beam. technique, such as, for example, the masking technique. the reserve areas delimiting the design to be realized on the silicium. lithography method, for example, using plasma. silicon dioxide (to obtain areas variously doped in the silicium).
All the stages of the manufacturing process can be repeated several times, the microlithography being, each time, the decisive phase in the obtaining of submicrometric figures with a good yield.
Amongst the known microlithographic techniques, the most used is photomasking or printing by projection; the designer of the integrated circuit has realized a series of opaque masks which will be used successively to obtain special designs on a photoresist (negative resist to obtain transparent designs, or positive resist to obtain opaque designs). Exposure is preferably realized with a short wavelength light of the ultraviolet light type. The positioning or repositioning of opaque masks on a wafer is a delicate operation, their respective alignment having to be very strict. Moreover, during exposure, the contact between the resist and the mask should be intimate, so as to avoid any shadow, which requires an accurate control of the dimentional deformations of the wafer and the mask. This technique allows the making on the wafers of designs, the resolution of which is close to 0.5 micrometers with a positive electroresist (the resolution of a negative resist being far poorer).
Beyond this point, i.e., if one wishes to obtain a design with a lower resolution, and try and reach in particular the limit of 0.1 micrometers, which is considered as being the limit fixed by semiconductor physics, the wavelength of an ultraviolet light is too great. That is why we developed non-optical microlithography techniques, based on the use of an electron or an X-ray beam, directly scanning, or "irradiating" through an appropriate mask, a resist sensitive to these rays. The best resolution obtained to date is close to 0.3 micrometers.
These latter techniques nevertheless still have serious inconveniences.
This is especially the case for the direct lithography of a resist by a beam of monokinetic electrons of appropriate energy; while this technique does not require the use of a mask, it is limited in resolution by often unacceptable secondary phenomenae. Indeed, there is an emission of secondary electrons when the electron beam hits the surface of the resist and that of the silicium. The resulting backscattering of electrons tends to thicken the etched designs, and in particular the lines traced, and to raise the exposure level of the bottom of the layer of resist and, in addition, to create a proximity effect between adjacent designs, requiring the calculation of corrective factors during exposure. The exposure therefore depends on the thickness of the resist, according to parameters difficult to control.
Non-optical lithography by soft X-rays (energy varying from 280 to 1000 eV) is a technique by projection through extremely fine masks which will undoubtedly enable to reach an ultimate resolution (0.1 micrometers). This technique does not have the inconveniences, previously mentioned, of the direct design by a beam of electrons, but it is necessary to realign the masks on the wafer at each stage of the manufacturing process of the integrated circuits, and the time required for these operations can be long.
Finally, we know of a very recent lithographical context, not yet having reached the stage of industrialization due to reasons explained hereafter. This proc
REFERENCES:
patent: 5214282 (1993-05-01), Yamaguchi et al.
De Fornel Frederique
Goudonnet Jean-Pierre
Mantovani James
Berman Jack I.
SIM (Societe d'Investissement dans la Microscopie) S.A.
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