Process and apparatus for adjusting traces

Data processing: software development – installation – and managem – Software program development tool – Testing or debugging

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C717S127000, C717S129000, C717S132000, C717S140000

Reexamination Certificate

active

07444623

ABSTRACT:
Traces routed through a computer depiction of a routing area of a system, such as an electronics system, comprise a plurality of connected nodes. The traces may be smoothed, straightened, or otherwise adjusted (e.g., to correct design rule violations) by assigning forces to the nodes and moving the nodes in accordance with the nodes. The forces may be based on such things as the proximity of the nodes to each other and to obstacles in the routing area.

REFERENCES:
patent: 4500963 (1985-02-01), Smith et al.
patent: 4642890 (1987-02-01), Hechtman et al.
patent: 5245550 (1993-09-01), Miki et al.
patent: 5557797 (1996-09-01), Yano
patent: 5592600 (1997-01-01), De Pauw et al.
patent: 5636129 (1997-06-01), Her
patent: 5657242 (1997-08-01), Sekiyama et al.
patent: 5717600 (1998-02-01), Ishizuka
patent: 5842017 (1998-11-01), Hookway et al.
patent: 5862381 (1999-01-01), Advani et al.
patent: 5926176 (1999-07-01), McMillan et al.
patent: 5948113 (1999-09-01), Johnson et al.
patent: 5956512 (1999-09-01), Simmons et al.
patent: 6014507 (2000-01-01), Fujii
patent: 6077311 (2000-06-01), Lichtenstein et al.
patent: 6256769 (2001-07-01), Tamarkin et al.
patent: 6275956 (2001-08-01), On et al.
patent: 6317869 (2001-11-01), Adl-Tabatabai et al.
patent: 6349403 (2002-02-01), Dutta et al.
patent: 6349406 (2002-02-01), Levine et al.
patent: 6385758 (2002-05-01), Kikuchi et al.
patent: 6490713 (2002-12-01), Matsumoto
patent: 6507805 (2003-01-01), Gordon et al.
patent: 6546548 (2003-04-01), Berry et al.
patent: 6553565 (2003-04-01), Click et al.
patent: 6665852 (2003-12-01), Xing et al.
patent: 6678876 (2004-01-01), Stevens et al.
patent: 6738961 (2004-05-01), Snider
patent: 6748583 (2004-06-01), Aizenbud-Reshef et al.
patent: 6862727 (2005-03-01), Stevens
patent: 6957422 (2005-10-01), Hunt
patent: 7178134 (2007-02-01), Groeschel
patent: 7200588 (2007-04-01), Srivastava et al.
patent: 2004/0088670 (2004-05-01), Stevens et al.
Goering, “Altium Preps Topological Autorouter,” EEdesign (Dec. 10, 2001), 3 pages.
CLAN Systems Ltd. PCB AutoRouter, 5 pages.
Hingston et al., “Topological Autorouting, Mapping the changing space,” Altium Limited (2002), pp. 1-8.
“Single-layer automatic router,” IBM Research, 3 pages.
Xing et al, “A minimum cost path search algorithm through tile onstacles,” ACM ISPD Apr. 2001, pp. 192-197.
Macii et al, “Combing wire swapping and spacing for low power deep submission buses,” ACM GLSVLSI, Apr. 2003, pp. 198-202.
Dion, “Fast printed circuit board routing,” ACM/IEEE Design Automation Conf., 1987, pp. 727-734.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process and apparatus for adjusting traces does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process and apparatus for adjusting traces, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process and apparatus for adjusting traces will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4012929

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.