Probing method and probing program

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

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07969172

ABSTRACT:
Disclosed is a probing method including, when the probes are configured to make contact with a chip row including four chips continuously arranged in an oblique direction so that the probe card test four chips at a time, finding a first reference oblique chip row extending in the oblique direction and containing a center chip positioned at the center of the wafer and a plurality of first additional oblique chip rows arranged in parallel with the first reference oblique chip row at an upper side of the first reference oblique chip row, and setting contact positions between the probes and the first oblique chip rows wherein the contact positions are positions of the probes obtained by shifting the probes; setting contact positions between the probes and the second oblique chip rows in an opposite direction to a first step; and setting a plurality of index group and test order.

REFERENCES:
patent: 6262586 (2001-07-01), Furasawa
patent: 7313494 (2007-12-01), Takahashi
patent: 5-299485 (1993-11-01), None
patent: 10-98082 (1998-04-01), None

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