Probeless DC testing of CMOS I/O circuits

Details Probeless DC testing of CMOS I/O circuits Probeless DC testing of CMOS I/O circuits

2006-03-02

2009-10-27

Hollington, Jermele M (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

07609079

ABSTRACT:
A method and implementation is described by which I/O input and output circuitry of a CMOS chip are measured without the need to probe the chip. Output driver transistors are used to provide marginal voltages to test input circuits, and the output driver transistors are segmented into portions where a first portion is used to provide a representative “on” current, which is coupled to a test bus that is further connected to a current comparator circuit contained within the chip. Both leakage and “on” current of the driver transistors is measured using segmented driver transistors. The output of the current comparator circuit is connected to a test scan register or to a test output from which test results are obtained digitally. The testing techniques are also applicable for other semiconductor devices.

REFERENCES:
patent: 5365200 (1994-11-01), Honnigford et al.
patent: 6262585 (2001-07-01), Frodsham et al.
patent: 6515500 (2003-02-01), Okuda
patent: 6681193 (2004-01-01), Dallavalle
patent: 6725171 (2004-04-01), Baur et al.
patent: 6774647 (2004-08-01), Kash et al.
patent: 6774656 (2004-08-01), Baur et al.
patent: 6797550 (2004-09-01), Kokubo et al.
patent: 7235997 (2007-06-01), Huang
patent: 2002/0029124 (2002-03-01), Dallavalle
patent: 2002/0078400 (2002-06-01), Baur et al.
patent: 2003/0224550 (2003-12-01), Kokubo et al.
patent: 2006/0012391 (2006-01-01), Huang
patent: 2006/0186946 (2006-08-01), Hughes
patent: 2007/0208526 (2007-09-01), Staudt et al.
patent: 06160487 (1994-06-01), None
“Verification and auto test for LCD driver/controller”, Li Zhuo et al., IEEE 2000, Proc. 5th Int'l Conf. on ASIC, Oct. 2003, vol. 2, pp. 1175-1178.
“I/O Self-Leakage Test”, by Ali Muhtaroglu et al., 2004 ITC Int'l Test Conf., Charlotte, NC, Oct. 26-28, 2004.
Piscataway, NJ, USA, IEEE, Oct. 26, 2004, pp. 903-906, XP010763697, ISBN: 0-7803-8580-2.

Affiliated with

Also associated with

Rating

Probeless DC testing of CMOS I/O circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Probeless DC testing of CMOS I/O circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Probeless DC testing of CMOS I/O circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4100156