Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2000-01-18
2002-11-12
Sherry, Michael (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S758010, C324S1540PB
Reexamination Certificate
active
06480012
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to probe card devices, and more particularly, to a probe card device which can test a plurality of semiconductor devices as they are formed on a wafer.
2. Description of the Background Art
Semiconductor devices are operated with higher power supply voltage than the normal level in use or in a more severe peripheral temperature condition than the normal temperature condition or maintained in a higher temperature condition for testing before shipment, so that devices with the possibility of causing initial failures could be removed. The test conducted for the purpose of improving the reliability of the semiconductor devices is called “burn-in”.
A conventional burn-in device for a burn-in test will be now described. The burn-in devices are divided into those for a burn-in test a semiconductor device formed in a wafer and those for testing of such semiconductor devices formed in a wafer in an assembled arrangement.
Herein, the former burn-in device will be described. Referring to
FIG. 17
, a wafer under test
101
having a semiconductor device formed thereon is placed at a wafer prober
105
. A burn-in board
102
is provided opposing to wafer under test
101
. Burn-in board
102
is electrically connected to a test head
106
and a tester
108
through a signal cable
107
.
Referring to
FIG. 18
, burn-in board
102
is provided with a plurality of board needles
103
respectively to be connected with a plurality of electrodes (pads) formed in the semiconductor device and a board connect pin
104
electrically connected to the test head
106
.
Referring to
FIG. 19
, in order to improve the processing performance in a burn-in test, a burn-in board
102
having a plurality of sets of board needles series
103
corresponding to individual semiconductor devices is used. The conventional burn-in device has the construction as described above.
The conventional burn-in unit suffers from the following problems. Burn-in board
102
is formed of glass epoxy resin or polyimide resin or the like, while wafer under test
101
is typically formed of silicon, and the materials of these elements have different thermal expansion coefficients.
As a result, if the temperature is raised in a burn-in test, the difference in the thermal expansion coefficients of the materials of burn-in board
102
and wafer under test
101
sometimes causes board needle
103
to shift from a prescribed pad in the semiconductor device in the surface of wafer under test
101
.
The difference in the warps of burn-in board
102
and wafer under test
101
sometimes causes board needle
103
to be detached from the pad in the semiconductor device, and a burn-in test cannot be successfully carried out.
SUMMARY OF THE INVENTION
The present invention is directed to a solution to the above-described problems, and it is one object of the present invention to provide a probe card device which can surely touch a prescribed electrode in a semiconductor device formed in a semiconductor substrate under test and successfully carry out a burn-in test.
The probe card device according to the present invention for testing a plurality of semiconductor devices formed on a substrate under test includes a probe substrate opposing the substrate under test and having a plurality of probe electrodes in electrical contact with the semiconductor devices and formed of the same material as that of the substrate under test. The probe substrate has a first seal member and a substrate through hole. The first seal member is provided on one surface opposing the substrate under test to hold the substrate under test by vacuum and seal between the substrate under test and the probe substrate. The substrate through hole is formed through the probe substrate for evacuation.
Thus, the probe substrate formed of the same material as that of the substrate under test has the same expansion coefficient as that of the substrate under test. As a result, if the temperature is raised in a test, a plurality of probe electrodes formed in the probe substrate and prescribed electrodes in the semiconductor device formed on the substrate under test corresponding to the probe electrodes will not be relatively shifted from one another. As a result, the probe electrodes and the prescribed electrodes surely come into contact, so that the semiconductor device may be surely tested.
A film is preferably provided at the other surface of the probe substrate to match the warps of the probe substrate and the substrate under test in testing.
In this case, the spacing between the probe substrate and the substrate under test will be substantially constant within the surface of the substrate under test. As a result, the plurality of probe electrodes formed in the probe substrate and the electrodes of the semiconductor device will not be departed from one another, so that they come into contact even more surely.
A plurality of patterns segmented by dicing lines are formed on the one surface of the probe substrate and the substrate through hole is formed in the region of the dicing lines.
In this case, the substrate under test is held by vacuum, and therefore the streaming resistance at the time of exhausting the space between the probe substrate and the substrate under test is relaxed, so that even evacuation may be efficiently achieved. As a result, the substrate under test can be evenly adsorbed.
The size of one shot pattern is preferably different from the size of one shot for the semiconductor device formed in the substrate under test.
In this case, the probe electrodes in the probe substrate can be surely brought into contact with prescribed electrodes in the semiconductor device formed in the substrate under test. More specifically, if the substrate under test is curved to form convex toward the side opposing the side of the probe substrate, the size of one shot pattern may be set smaller than that of the semiconductor device, so that the electrodes in the substrates can be surely brought into contact. Meanwhile, if the substrate under test is curved to form convex toward the side of the probe substrate, the size of one shot pattern may be set larger than that of the semiconductor device, so that the electrodes can be surely brought into contact.
The pattern of the probe substrate preferably has at least two interconnection layers.
In this case, the flexibility of the pattern formed in the probe substrate is improved. Sufficient current may be stably supplied for testing the semiconductor device.
The pattern of the probe substrate includes a prescribed circuit portion pattern for use in testing the substrate under test. The prescribed circuit portion pattern includes a power supply generating circuit, a clock signal generating circuit, a test circuit or a counter circuit.
Thus, defects in a particular part of the semiconductor device may be found early and the semiconductor device may be operated at a high speed. Thus, semiconductor devices with the possibility of causing initial failures may be removed in earlier stages. Data on the failure percentage or defective positions may be collected to alleviate the quality control of the semiconductor devices.
The probe electrode formed in the probe substrate preferably includes a bump electrode.
Thus, damages to prescribed electrodes in a semiconductor device formed in the substrate under test may be restrained. As a result, if a pad electrode to be wire-bonded is applied as a prescribed electrode in a semiconductor device, failures in wire-bonding to the pad electrode may be reduced.
The first seal member formed in the probe substrate preferably includes a ring-shaped insulating film formed around the outer periphery of the probe substrate.
Thus, the ring-shaped insulating film comes into contact with the vicinity of the outer periphery of the substrate under test, and the substrate under test may be surely adsorbed by vacuum.
The probe substrate preferably has at least two substrate side alignment marks on the side of the probe substrate cor
Hollington Jermele
Mitsubishi Denki & Kabushiki Kaisha
Sherry Michael
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