Priority selection circuit

Details Priority selection circuit Priority selection circuit

2007-04-19

2010-10-19

Trost, IV, William (Department: 2472)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S230000, C370S386000, C709S229000, C710S244000

Reexamination Certificate

active

07817653

ABSTRACT:
A circuit includes a first selection module having first data input, second data input, first validation input, second validation input, selected data output, marker output, and presence output. A first validation signal received at the first validation input identifies whether or not a first data signal received at the first data input is valid; a second validation signal received at the second validation input identifies whether or not a second data signal received at the second data input is valid; a presence signal outputted at the presence output identifies whether or not at least one data signal is valid; and the first data input has an assigned selection priority higher than that assigned to the second data input. If at least one data signal is identified as valid, the valid data signal having the higher assigned priority is transferred to the selected data output.

REFERENCES:
patent: 5835491 (1998-11-01), Davis et al.
patent: 6744728 (2004-06-01), Chung
patent: 6912225 (2005-06-01), Kohzuki et al.
patent: 7263097 (2007-08-01), Ornes et al.
patent: 7623519 (2009-11-01), Tornetta et al.
patent: 2002/0085578 (2002-07-01), Dell et al.
patent: 2008/0159145 (2008-07-01), Muthukrishnan et al.

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