Priority order judging device

Details Priority order judging device Priority order judging device

1990-01-24

1993-07-20

Fleming, Michael R.

Boots, shoes, and leggings

3642426, 3642591, 364DIG1, 36493701, 3649471, 364DIG2, G06F 1318

Patent

active

052300544

ABSTRACT:
Each priority order signal (a code signal having a plurality of digits) is processed at each gate circuit in the following manner. The level of a K-th digit input code signal among the priority order signals is checked and the level of a K-th order judgement result signal is fed-back from a judgement circuit. In the first case where the former level is "0" and the latter level is "1", "0" (or "1") is outputted as the (K+1)-th, (K+2)-th, . . . order output signals and supplied to the judgement circuit. In the cases other than the first case, the inputted (K+1)-th digit input code signal is outputted as it is as the (K+1)-th order output signal and supplied to the judgement circuit. The judgement circuit performs a logical OR (or NAND) operation for each order and the results are outputted as judgement result signals.

REFERENCES:
patent: 4334288 (1982-06-01), Booher
patent: 4594590 (1986-06-01), Van Hatten et al.
patent: 4829467 (1989-05-01), Ogata
IBM Technical Disclosure Bulletin, vol. 29, No. 3, Aug. 1986, New York, US, pp. 1361-1362, "Round Robin Selection Device Using a Feedback Priority Encoder".

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