Priority logic system

Details Priority logic system Priority logic system

1986-01-17

1988-11-29

Zache, Raulfe B.

Boots, shoes, and leggings

364521, G06F 314, G06F 1214, G06F 1300, G06F 1326

Patent

active

047886404

ABSTRACT:
An improved priority logic scheme for setting priority values determining priority of interrupts. Multi-level priority allows for varied priority values for single word and multiple-word block segment transfers. Registers allow for programmable priority values which can modify priority values during operation. Simplicity of the invention provides for priority circuitry which does not depend on clock cycles. Flexiblity of the circuitry allows for additional devices to be implemented within the scheme. The invention is described as developed in a single semiconductor chip with other processors to provide a single graphics chip capability.

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Hughes et al., "Control Program for Providing Priority Tasking", IBM Technical Disclosure Bulletin, vol. 22, No. 11, (Apr. 1980), pp. 5134-5137.
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