Priority circuit

Details Priority circuit Priority circuit

2006-09-12

2006-09-12

Elms, Richard (Department: 2824)

Static information storage and retrieval

Associative memories

Ferroelectric cell

Reexamination Certificate

active

07106608

ABSTRACT:
In a priority circuit, priority processing is rapidly performed without lowering the voltage level of a signal propagated through serially connected transistors. When the priority circuit is placed in a non-operational state by turning off an NMOS transistor in accordance with a precharge enable signal, potentials on propagating signal nodes and a HIT output terminal are precharged to H potential by PMOS transistors used for precharging. Therefore, when the NMOS transistor is turned on and the priority circuit enters an operational state, if input signals include a H-level signal, the lowering of the voltage level of a propagated signal is suppressed in increasing the potentials on the propagating signal nodes and the HIT output terminal to the H potential by PMOS transistors used for detecting a HIT signal. Thus, malfunction derived from noise can be prevented.

REFERENCES:
patent: 5555397 (1996-09-01), Sasama et al.
patent: 6307855 (2001-10-01), Hariguchi
patent: 6665202 (2003-12-01), Lindahl et al.
patent: 6934172 (2005-08-01), Regev et al.
patent: 60-59595 (1985-04-01), None

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