Priority-based memory management method and apparatus

Details Priority-based memory management method and apparatus Priority-based memory management method and apparatus

1994-12-08

1999-03-09

Chan, Eddie P.

395486, G06F 1212

Patent

active

058812660

ABSTRACT:
The hit ratio of a cache memory in a data base processing system is improved by changing the priority of erasing cache data. A forward/backward pointer and a backward/forward pointer are contained as cache management information. At a completion of access of all the data of a table and before the next access of a table begins, the forward/backward pointer is changed to the backward/forward pointer and the backward/forward pointer is changed to the forward/backward pointer if the hit ratio is lower than expected ratio. Depending on the type of data access or external commands, the priority of erasing cache data is further changed to achieve a high hit ratio.

REFERENCES:
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patent: 5257352 (1993-10-01), Yamamoto et al.
patent: 5305389 (1994-04-01), Palmer
patent: 5452440 (1995-09-01), Salsburg
patent: 5515519 (1996-05-01), Yoshioka et al.
Hennessy et al., "Computer Architecture A Quantitative Approach", 1990, pp. 411-412.

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