Prioritized clock selection circuit

Details Prioritized clock selection circuit Prioritized clock selection circuit

1983-12-22

1985-08-27

Atkinson, Charles E.

Excavating

179 18EE, 371 8, G06F 104, G06F 1120, H04Q 354

Patent

active

045382727

ABSTRACT:
A clock selection circuit which selects and enables one of a plurality of clock circuits in response to initialization by a processing unit or detection of failure of an on-line clock circuit. The clock circuits are selected on the basis of a priority arrangement. The clock circuit failure is detected by a retriggerable monostable multivibrator and the selection priority is based on time delays generated by programmed counters associated with each clock circuit.

REFERENCES:
patent: 3803568 (1974-04-01), Higashide
patent: 4144448 (1979-03-01), Pisciotta et al.
patent: 4322580 (1982-03-01), Khan et al.
patent: 4490581 (1984-12-01), Edwards et al.

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