Printing optimized global alignment mark at contact/via layers

Details Printing optimized global alignment mark at contact/via layers Printing optimized global alignment mark at contact/via layers

1999-01-19

2000-11-14

Tsai, Jey

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Having substrate registration feature

H01L 2176

Patent

active

061469696

ABSTRACT:
Scribeline alignment marks and a method of forming the scribeline alignment marks are provided for auxiliary alignment marks on an integrated circuit wafer. The scribeline alignment marks have the same shape and size as the contact holes formed in a layer of dielectric. The scribeline alignment marks are located in alignment rectangles in an X and Y array filling each of the alignment rectangles. Since the alignment marks have the same size and shape as the contact holes the alignment marks will not be overexposed when they are formed using a photolithographic process optimized for the contact holes. When the alignment marks are filled with metal and the wafer is planarized a step height between the top of the metal in the alignment mark hole and the dielectric allows the alignment marks to be used for automatic wafer positioning.

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