Printer interface with memory bus arbitration

Details Printer interface with memory bus arbitration Printer interface with memory bus arbitration

1991-02-26

1992-12-29

Richardson, Robert L.

395425, 395110, G06F 300, G06F 1316

Patent

active

051758210

ABSTRACT:
An interface system for a printer and a print font chip includes an I/O port which is integral with the printer and receives from the printer address bits, data bits and control logic. A memory bus is electrically connected to the I/O port. The memory bus transmits and receives address bits, data bits and control logic from the I/O port. At least one print font chip is capable of generating address bits, data bits and control logic. Interfacing circuitry interfaces the memory bus and at least one font chip. The interfacing circuitry is bidirectional and capable of transmitting address bits, data bits and control logic between the bus and the font chip. Bus arbitration circuitry accesses the memory bus by at least one font chip. The arbitration circuitry is characterized in terms of priority. The font chips are assigned a predetermined priority by which access to the memory bus is determined.

REFERENCES:
patent: 4954979 (1990-09-01), Eibner et al.
patent: 4992956 (1991-02-01), Kaku et al.

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