Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1997-01-22
2001-09-18
Paladini, Albert W. (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C257S692000, C257S737000, C257S738000
Reexamination Certificate
active
06291778
ABSTRACT:
TECHNICAL FIELD
This invention relates to a printed circuit board and more particularly to a printed circuit board suitable for the high densification of mounting-parts using a solder bump and for improvements of connection reliability and mounting reliability.
BACKGROUND ART
At the present, there has been a demand to obtain high performance electronic equipment. Lately, this demand has been strongly oriented towards super-miniaturization and reduction of thickness and weight in fields of mobile and portable electronic equipments. In the field of printed circuit boards, therefore, there is a demand for developing a technique corresponding to the high densification of mounting electronic parts (chips) onto a wiring substrate.
As the conventional technique suitable for the high densification of mounting the part, there is known a flip chip mounting method in which a solder bump is arranged on a surface mounting pad formed in the wiring substrate and the solder bump is joined to the chip.
Such a flip chip mounting is concretely a technique in which a conductor circuit including a mounting pad is formed on the mounting surface of the wiring substrate and then a solder is fed on the mounting pad through a solder resist to form a solder bump in an opening portion of the resist and thereafter the solder bump is subjected to a reflow treatment to conduct an electrical connection between the solder bump and an electronic part.
However, the flip chip mounting has a number of problems, as follows:
(1) In the flip chip mounting, the opening portion of the solder resist feeding the solder in the printed circuit board is formed by exposing portions other than the openings to a light through a photomask film printed with an opening pattern, dissolving and removing unexposed portions through development treatment and then conducting thermosetting. The thus formed opening portion of the solder resist has hitherto been constituted by making the size smaller than the size of the mounting pad and overlapping the edge of the opening portion with the outer peripheral edge (outer periphery of the pad) of the mounting pad as shown in FIG.
1
. That is, opening edge of the solder resist locates on the surface of the pad. Therefore, when light is exposed on positions other than the opening of the solder resist, the difference in hardness through light exposure between an upper layer portion and a lower layer portion of the solder resist is caused due to deflection of incident light and the like. Particularly, the pad surface is easily subjected to an influence of light scattering produced on the surface. For this end, the curing through light exposure becomes insufficient at the boundary between the lower layer of the solder resist and the pad surface in the formation of the opening portion of the solder resist and hence the solder resist is eroded up to the position other that the opening portion by the development treatment. As a result, there is caused a problem that a gap is created in the boundary between the opening edge of the solder resist and the pad through the subsequent thermosetting.
(2) When the solder bump is formed on the mounting pad by feeding the solder to the opening portion of the solder resist in the printed circuit board, it is necessary that the surface of the mounting pad exposed in the opening portion of the solder resist is previously subjected to Ni/Au plating. In the conventional structure of the solder resist described in the above item (1), therefore, a plating solution sinks into the gap produced between the opening edge of the solder resist and the pad in the Ni/Au plating treatment and the precipitation of the plated film proceeds in this portion to conduct the penetration between the solder resist and the pad. As a result, there is caused a problem of causing the floating (peeling) in the opening edge of the solder resist.
(3) When the solder bump is formed on the mounting pad by feeding the solder into the opening portion of the solder resist in the printed circuit board, in order to avoid the drawbacks such as flowing of solder, solder bridge and the like, it is necessary to arrange a step difference between the mounting pad surface and the solder resist surface. Therefore, it is desirable to make the thickness of the solder resist thicker as far as possible. However, as the mounting pad becomes small in accordance with the high densification of mounting the part, it is very difficult to feed the solder to the pad and even if the step difference is arranged, there is caused a problem that the drawbacks such as solder flowing, solder bridge and the like can not be avoided in the formation of the solder bump on a small-size pad. Further, in the conventional structure of the solder resist described in the item (1), the solder contacts with the solder resist, so that there is a problem that crack is created from the contact point.
(4) There is a tendency that the area of the pad becomes small accompanied with the high densification of mounting the part through the reductions of the weight, thickness and length of the elctronic part. In order to cope with this tendency, it is necessary to form a fine opening portion in the solder resist and attain the improvement of the resolution of the solder resist. However, there is a problem that sufficient resolution is not obtained in the conventional structure of the solder resist described in the item (1) subjected to an influence of light scattering produced on the pad surface during the light exposure.
(5) In case of rendering the wiring substrate into multilayer, it is necessary that the viahole or through-hole existing on the mounting surface is completely clogged with the solder resist. However, it is very difficult to realize the complete clogging and hence there is a problem of leaving drawbacks such as bubble, unfilled portion and the like. These drawbacks bring about the occurrence of crack through thermal shock, burn out and the like and hence the connection reliability lowers.
(6) In case of rendering the wiring substrate into multilayer, it is general to connect the wiring substrate to the chip by newly wiring the mounting pad for the formation of the solder bump from the viahole. Therefore, there is a problem that the wiring length becomes longer to lower the wiring density and hence it is difficult to mount the part in a higher density.
SUMMARY OF THE INVENTION
It is an object of the invention to solve the aforementioned problems in the part mounting using the solder bump (flip chip mounting) and to provide a printed circuit board suitable for the high densification of mounting the part using the solder bump and for the improvements of the connection reliability and mounting reliability.
For this purpose, a first object is to provide a printed circuit board having a new structure that the resolution is excellent without causing the peeling of the solder resist and the solder bump for mounting the part can surely be fed to the pad surface.
A second object is to provide a printed circuit board having a new structure that the solder bump for mounting the part can surely be fed to the pad surface without lowering the wiring density and the connection reliability.
Moreover, JP-A-4-337695 discloses a technique of electrically connecting the wiring layers provided on both sides of the insulating layer through the solder. On the contrary, the invention is concerned with a new structure of solder resist and solder bump suitable for mounting electronic parts onto a wiring substrate, which is clearly different from the technique of JP-A-4-337695. Further, the technique disclosed in JP-A-4-337695 lies in a point that the solder is contacted with the insulating resin layer. Therefore, if this technique is applied to the invention, there are caused new problems that {circle around (1)} lead diffuses into the resin of the insulating layer to cause shortcircuit between the layers or between patterns, and {circle around (2)} the solder having a poor wettability to the resin is apt to be peeled off from the contact surface to the r
Asai Motoo
Hiratuka Shinji
Kawade Masato
Greenblum & Bernstein P.L.C.
Ibiden Co. Ltd.
Paladini Albert W.
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