Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1999-09-23
2002-04-09
Cuneo, Kamand (Department: 2831)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S262000
Reexamination Certificate
active
06369334
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to electronic circuit cards, and more particularly to a device and technique for adding wires and new components to an electronic circuit card.
BACKGROUND OF THE INVENTION
Electronic circuit cards such as printed circuit boards (PCBs) may utilize surface mount technology (SMT) cards or pin-in-hole (PIH). SMT cards used for high power applications typically may comprise a relatively thick carrier layer such as copper (for heat dissipation or ground plane), a plurality of circuit layers, and electronic components mounted on a surface of the outermost circuit layer. Each circuit layer comprises a metallization on an insulating sheet, for example, IBM ASM photo-imageable epoxy, epoxy-glass pre-preg, or the like. The metalization comprises conductors and surface lands. Each component may be soldered to a surface land on the outermost layer, and conductors in the outermost and inner layers may be used to interconnect the component to other components. If conductors in the inner layers are required for the component interconnection, then an inter-layer connection is required between the surface lands of the outermost and inner layers.
With the advent of accelerated product development cycles and product announcements, newly designed printed circuit boards are often produced in high volumes prior to complete electrical circuit debug. As a result, a possibility exists that a large quantity of the printed circuit boards will not perform electrically. Typically, wires must be added, moved, and/or deleted, and new components must be added and/or removed from the printed circuit board to correct this problem. It is not uncommon to manufacture early designs that require the addition of one hundred (100) or more wires and several new components. Wires that are added to the printed circuit board are typically referred to as “EC wires.”
Several processes have been developed to add EC wires and components to a printed circuit board. One such process is typically referred to as “yellow wire.” This process includes hand soldering of a discrete insulated wire from point to point on the printed circuit board. This is an extremely laborious, time consuming, and expensive process. The estimated cost of this process is $2.25 per EC wire added. This process is error prone because it involves manual reading of a schematic drawing and then soldering the wire to the proper points on the printed circuit board. Further, the addition of new components using this process can be difficult. Finally, the added wires are not cosmetically pleasing to the end user.
A study performed by International Business Machines Corporation examined a subset of the total printed circuit board designs produced from 1988-1990. The average number of EC wires per card was nine (9) or thirty (36) per panel. The total number of EC wires was observed as high as 150 wires per card with approximately 20% of the applications studied having 20 or greater wires per card. Using the “yellow wire” EC process described above, the average cost per panel for adding the necessary EC wires was $81.
A second process to correct printed circuit boards includes screen printing insulating and conducting inks on the surface(s) of the printed circuit board. New component lands can also be screen printed. Typically, this process includes three or more separate screen printing and curing steps. This process is more economical than the yellow wire process because all of the wires are screen printed at one time. This process suffers, however, from several problems.
First, wires having a resolution less than 0.0254 cm(0.010 inches) wide can not be screen printed because screen printing has a limited resolution. This limit also restricts the placement of wires on the printed circuit board. For example, it may be difficult to route a wire between two SMT lands because of the resolution limitation. In addition, conductive inks used in the screen printing process typically have {fraction (1/30)}th to {fraction (1/10)}th the conductivity of copper and, hence, can only be used for non-critical circuit lines where resistance is not a factor. Finally, the conductive inks are not solder wettable. As a result, problems may arise when wires are to be connected to SMT lands or added component lands where solder is to be applied.
A third method to correct printed circuit boards is Flexible Applique Rework (FAR) in which one or two-sided flex circuits including wire adds are fabricated and attached to the printed circuit board. Interconnects between the flex circuit and the circuit board are reflowed using solder. One disadvantage of this technique is the cost of the FAR. In addition, the FAR must be intricately profiled so that it does not interfere with the components that are to be added to the printed circuit board.
Hence, it is desirable to provide a low cost technique for printed circuit board EC wire and component additions, where the EC wires provide the same electrical performance as the original printed circuit board, and the integrity of the original circuit board is not compromised.
SUMMARY OF THE INVENTION
The invention is directed to an electronic circuit card. The electronic circuit card is made by the process including the steps of providing an electronic circuit card with external electrical circuits. A photoimageable dielectric layer is formed on the electronic circuit card. A metal foil layer is laminated on the photoimageable dielectric layer and the metal foil layer is patterned to form a wire and a component add land pattern. The photoimageable dielectric layer is patterned and the wire and the component add land pattern are electrically connected.
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patent: 5112230 (1992-05-01), DeSimone
patent: 5181317 (1993-01-01), Nishihara et al.
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patent: 5451720 (1995-09-01), Estes et al.
patent: 5665650 (1997-09-01), Lauffer et al.
patent: 5993945 (1999-11-01), Russell et al.
patent: 6127634 (2000-10-01), Higashiguchi et al.
Cuneo Kamand
International Business Machines - Corporation
Samodovitz, Esq. Arthur J.
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