Printed circuit board with soldering lands

Details Printed circuit board with soldering lands Printed circuit board with soldering lands

2005-04-11

2008-08-19

Williams, Alexander O (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With dam or vent for encapsulant

C257SE23011, C257S735000, C257S779000, C257S773000, C257S774000, C257S775000, C257S776000, C257S783000, C257S782000, C257S781000, C257S780000, C257S698000, C257S696000

Reexamination Certificate

active

07414301

ABSTRACT:
The present invention provides a printed circuit board having an area of non-resist portion, where each non-resist portion expands gradually toward the back end of a land array in the dipping direction A. Thus the area of solder deposition also expands in the region of the land array, thereby excessive solder does not remain up to the back end of the land array, and resultantly the amount of solder buildup at the backside in the dipping direction A can be reduced. Further, the present invention makes it unnecessary to dispose a dummy land for the prevention of solder buildup at the backmost portion of the land array, and thus the space used for a dummy land can be utilized effectively.

REFERENCES:
patent: 2002/0179323 (2002-12-01), Sakai et al.
patent: 2002/0185304 (2002-12-01), Sakai et al.
patent: 2003/0235043 (2003-12-01), Yoshida
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patent: 10-290065 (1998-10-01), None
patent: 1998-290065 (1998-10-01), None
patent: 11-145607 (1999-05-01), None
patent: 3088837 (2002-07-01), None
patent: 2003-142810 (2003-05-01), None
patent: 2003-142810 (2003-05-01), None
Japan Notice of the reason for refusal, dated Jul. 18, 2007.

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