Printed circuit board having a buried solder bump and a...

Details Printed circuit board having a buried solder bump and a... Printed circuit board having a buried solder bump and a...

2009-02-11

2011-10-18

Prasad, Chandrika (Department: 2839)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

Reexamination Certificate

active

08039762

ABSTRACT:
Disclosed is a printed circuit board having a buried solder bump, in which a circuit pattern and a solder bump formed on the circuit pattern are buried in an insulating layer, thus improving the degree of matching between the solder bump and the circuit pattern and obviating a need for an additional coining process of the solder bump. A manufacturing method thereof is also provided.

REFERENCES:
patent: 4706167 (1987-11-01), Sullivan
patent: 5261989 (1993-11-01), Ueltzen
patent: 5384689 (1995-01-01), Shen
patent: 7906850 (2011-03-01), Wang et al.
patent: 2007/0182379 (2007-08-01), Ueda et al.
patent: 2008/0314633 (2008-12-01), Kang et al.
patent: 59-46094 (1984-03-01), None
patent: 08-204333 (1996-08-01), None
patent: 2002-076598 (2002-03-01), None
patent: 2004-047898 (2004-02-01), None
Japanese Office Action issued Oct. 26, 2010 in corresponding Japanese Patent Application 2009-030733.

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