Printed circuit board fault injection circuit

Details Printed circuit board fault injection circuit Printed circuit board fault injection circuit

1994-01-25

1996-08-27

Beausoliel, Jr., Robert W.

Excavating

324 731, G01R 3128

Patent

active

055508448

ABSTRACT:
The printed circuit board fault injection circuit uses an automated fixture to enable a robot arm mechanism to position a probe at a designated test node on the printed circuit board under test and apply a fault signal thereto. The test apparatus ensures that the designated node is in contact with the fault injector probe and controllably applies a voltage and/or current signal of selected magnitude to the test node to typically create a stuck-at-one or a stuck-at-zero fault or any other definable condition. The fault injector probe produces a stuck-at-zero fault that is not subject to spurious high frequency harmonics by extending the dynamic range of the fault injector circuit to apply a negative voltage to the test node to rob the output stage of the logic circuit that drives the test node of all drive current, thereby forcing a solid stuck-at-zero condition. Additional monitoring circuitry is provided to detect excessive current drain from the fault injector circuit into the test node to avoid causing damage to the printed circuit board under test.

REFERENCES:
patent: 3772595 (1973-11-01), De Wolf et al.
patent: 4439858 (1984-03-01), Peterson
patent: 4727317 (1988-02-01), Oliver
patent: 4759019 (1988-07-01), Bentley et al.
patent: 4918385 (1990-04-01), Shreeve
patent: 5124647 (1992-06-01), Watts
patent: 5126659 (1992-06-01), Edwards
patent: 5212442 (1993-05-01), O'Toole et al.

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