Printed circuit board capacitor structure and method

Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor

Reexamination Certificate

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Details

C361S263000, C361S301400, C361S323000

Reexamination Certificate

active

06574090

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to capacitive elements for circuit boards having improved decoupling capacitance reliability and, more particularly, to a circuit board or chip carrier or the like and method of manufacturing the same, wherein the board or chip carrier uses multiple layers of dielectric material yet achieves high capacitance.
2. Background Art
In the manufacture of circuit boards or chip carriers or the like, it is desirable to create as high a capacitance as possible between various ground, voltage and signal planes to thereby minimize the amount of discrete decoupling capacitors required on the board surface. The equation for determining capacitance is C=eA/t where C is the capacitance, e is the dielectric constant or relative permittivity of the dielectric material, A is the available area, and t is the thickness of the dielectric material or the spacing between the plates of the capacitor. Thus, to increase the capacitance of a capacitor of a given area, one can select a material having an increased dielectric constant and/or decrease the thickness of the dielectric material. However, the selection of the dielectric material is often limited by many production and configuration limitations which leaves the principal means of increasing the capacitance to a reduction in thickness of the dielectric material. However, a problem encountered with certain types of dielectric material, especially epoxy impregnated glass cloth, but other materials as well at thinner gauges, is that any defects in the material in the form of pin holes or voids tend to extend from one surface to the other, thus resulting in failure of the structure either under test conditions or, even worse, they may pass testing but fail under field use conditions. Therefore, it is desirable to form a circuit board or chip carrier having reduced thickness of the dielectric material for improved capacitance but with improved reliability.
SUMMARY OF THE INVENTION
According to the present invention, a capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed by selecting a pair of conductive sheets and laminating a dielectric component between the two sheets. The dielectric component is formed of two or more separate sheets of dielectric material, at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component should be as thin as possible in accordance with the equation for capacitance (C=eA/t). Thus, the thickness should not exceed about 4 mils and preferably should be 2 or 3 mils or less. Thus, each single dielectric sheet should not exceed about 2 mils and preferably should not exceed about 1 or 1.5 mils in thickness. The use of two or more sheets of dielectric material makes it very unlikely that two or more defects in the sheets of dielectric material will align, thus greatly reducing the probability of a defect, causing a failure in test or field use.
In one embodiment, a pair of ultra thin epoxy impregnated sheets of glass cloth are B-stage (partially) cured and then are laminated between two sheets of conducting material, preferably copper, with the lamination process fully curing the epoxy impregnated cloth to form the laminate structure. In other embodiments, one or more sheets of dielectric material are laminated to one or more sheets of conductive material or a film of dielectric material is coated on one or more sheets of conductive material and B-stage cured or softened and then further laminated and fully cured or hardened to form the structure. In other embodiments, sheets of various dielectric materials are laminated to each other and to copper sheets by various techniques. In still other embodiments, films of dielectric material are coated on copper sheets and B-stage cured, laminated and fully cured. In yet other embodiments, different dielectric materials are used to form the dielectric component; for example, epoxy is first coated on opposite sides of another dielectric material such, as a polyimide sheet, B-stage cured, and then further laminated to two sheets of conducting material.


REFERENCES:
patent: 4690836 (1987-09-01), Clarke et al.
patent: 6215649 (2001-04-01), Appelt et al.

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