Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1999-06-09
2001-11-27
Gaffin, Jeffrey (Department: 2861)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S251000, C174S255000, C174S263000
Reexamination Certificate
active
06323438
ABSTRACT:
RELATED APPLICATION DATA
The present application claims priority to Japanese Application No. P10-161626 filed Jun. 10, 1998, which application is incorporated herein by reference to the extent permitted by law.
BACKGROUND OF THE INVENTION
The present invention relates to a printed circuit board having a wiring pattern and a semiconductor device in which a semiconductor element is mounted on an element mounting portion of the printed circuit board.
As one type of semiconductor devices in which a semiconductor element is mounted on a printed circuit board, there is known a structure called a BGA (Ball Grid Array), for example, shown in FIG.
1
. In this figure, reference numeral
1
designates a semiconductor device in which a semiconductor element
3
is mounted on a printed circuit board
2
and is sealed with a resin
4
.
The printed circuit board
2
is formed into a square shape as shown in
FIG. 2
, in which a number of electrical wiring patterns
5
are arranged at a peripheral portion. An element mounting portion
6
on which the above semiconductor element
3
is to be mounted is defined at a central portion of the printed circuit board
2
, that is, a portion surrounded by the number of electrical wiring patterns
5
.
A solder resist portion
7
is, as shown in
FIG. 1
, provided on the electrical wiring patterns
5
and the element mounting portion
6
on the printed circuit board
2
, and the semiconductor element
3
is mounted on the solder resist portion
7
at a location directly over the element mounting portion
6
. The semiconductor element
3
is bonded on the solder resist portion
7
with an adhesive
8
, to be thus mounted on the element mounting portion
6
via the solder resist portion
7
.
As the adhesive
8
, there is used a conductive adhesive such as a silver paste or an insulating adhesive.
In
FIG. 1
, reference numeral
9
designates gold wires for electrically connecting the semiconductor element
3
to the electrical wiring patterns
5
, and
10
is solder balls electrically connected to the electrical wiring patterns
5
.
In the semiconductor device
1
, the semiconductor element
3
is positioned not only directly over the element mounting portion
6
on which the electrical wiring patterns
5
are absent, but also directly over part of the electrical wiring patterns
5
, and accordingly a surface area, on which the semiconductor element
3
is mounted, of the solder resist portion
7
is irregularly raised by part of the electrical wiring patterns
5
located under the surface area of the solder resist portion
7
, to form large steps on the surface area of the solder resist portion
7
.
The formation of such large steps on the solder resist portion
7
, however, has a problem. Namely, by the presence of the large steps, the adhesive
8
for bonding the semiconductor element
3
on the solder resist portion
7
causes a large variation in its coating state such as the coating thickness or spread of wetting. To be more specific, as shown in
FIG. 1
, at the area directly over the element mounting portion
6
on which the electrical wiring patterns
5
are absent, even if the coating amount of the adhesive
8
is increased, the spread of wetting of the adhesive
8
is hard to occur; while at the area directly over the electrical wiring patterns
5
, if the coating amount of the adhesive
8
is decreased, the spread of wetting of the adhesive
8
becomes excessively large.
The variation in coating state of the adhesive
8
at the bonding portion of the semiconductor element
3
obstructs obtainment of a stable adhesion strength of the semiconductor element
3
to the printed wiring board
2
, and also causes cracks in the semiconductor element
1
upon reflow, to thereby harm stabilization of the quality of the semiconductor device.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a printed circuit board capable of stabilizing the adhesively bonding state of a semiconductor element on the printed circuit board, thereby improving the quality of a semiconductor device upon mounting of the semiconductor device, and a semiconductor device using the printed circuit board.
In an embodiment, the present invention provides a semiconductor device comprising a printed circuit board having an element mounting portion. Further, a wiring pattern is arranged at peripheral portions of the printed circuit board. The present invention also comprises a dummy wiring pattern centrally disposed over the element mounting portion wherein the dummy wiring pattern has a height substantially equal to that of the wiring pattern. A solder resist portion is disposed over the wiring pattern and dummy pattern in which the solder resist portion being is supported substantially uniform by the wiring pattern and the dummy pattern. Further, a semiconductor element is bonded substantially flat above the solder resist portion.
With this configuration, since the dummy wiring pattern having a thickness nearly equal to that of the wiring pattern is provided on the element mounting portion, the height of a semiconductor element mounting plane on the element mounting portion provided with the dummy wiring pattern is nearly equal to the height of a semiconductor element mounting plane on the wiring pattern, so that it is possible to prevent occurrence of large steps on the semiconductor element mounting plane.
According to a second aspect of the present invention, there is provided a semiconductor device including: a printed circuit board having a wiring pattern and an element mounting portion; and a semiconductor element fixed on said element mounting portion using an adhesive; wherein a dummy wiring pattern having a thickness nearly equal to that of said wiring pattern is provided on said element mounting portion.
In an embodiment, the present invention provides a semiconductor device comprising a printed circuit board having element mounting portion. Further, a wiring pattern is arranged at peripheral portions of the printed circuit board. The present invention also comprises a dummy wiring pattern, having irregularities, centrally disposed over the element mounting portion wherein the dummy wiring pattern has a height substantially equal to that of the wiring pattern. Further, a solder resist portion is disposed over the wiring pattern and dummy pattern in which the solder resist portion is supported substantially uniform by the wiring pattern and the dummy pattern to prevent large variations of thickness of the solder resist portion. The solder resist portion adheres to the irregularities of the dummy wiring pattern. A semiconductor element is bonded substantially flat above the solder resist portion by an adhesive wherein the adhesive is configured to the semiconductor element without a gap therebetween to enhance the wettability of the adhesive to the semiconductor element.
REFERENCES:
patent: 5027188 (1991-06-01), Owada et al.
patent: 5223454 (1993-06-01), Uda et al.
patent: 5408383 (1995-04-01), Nagaska et al.
patent: 5442236 (1995-08-01), Fuzakawa
Alcala José H.
Gaffin Jeffrey
Sonnenschein Nath & Rosenthal
Sony Corporation
LandOfFree
Printed circuit board and semiconductor device using the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Printed circuit board and semiconductor device using the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Printed circuit board and semiconductor device using the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2593555