Prevention of the propagation of jitters in a clock delay...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S158000, C327S270000

Reexamination Certificate

active

11254050

ABSTRACT:
The clock delay circuit according to the present invention includes a delay circuit section, a selection circuit section, and jitter suppression elements. The delay circuit section provides a plurality of delay clock signals that are obtained by delaying a clock signal with a different delay amount. The selection circuit section selects and provides any one of a plurality of delay clock signals that are provided from the delay circuit section. The jitter suppression elements are connected in series between the delay circuit section and the selection circuit section. When jitters occur at the time of switching the delay clock signals at the selection circuit section, the jitter suppression elements serve to prevent the propagation of the jitters through the delay circuit section.

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