Prevention of surface channels in silicon semiconductor devices

Details Prevention of surface channels in silicon semiconductor devices Prevention of surface channels in silicon semiconductor devices

1981-03-25

1984-02-07

Edlow, Martin H.

357 52, 357 54, H01L 2940

Patent

active

044306636

ABSTRACT:
In planar silicon semiconductor devices of the PN junction type, field plates overlie the silicon dioxide-silicon nitride film on the device surface to inhibit inversion formation of conductive channels on the device surface. The field plates are connected to a more heavily doped zone on one side of a PN junction and extend some distance over the lightly doped zone on the other side of the PN junction.
At high reverse biases, the presence of trapping centers produces a charge level at the device surface, resulting in current channeling which produces excessive reverse leakage current. This effect is avoided or reduced by omitting the silicon nitride layer in a portion overlying the more lightly doped zone and spaced away from the PN junction boundary. This omission eliminates a portion of the oxide-nitride interface which appears to be the locus of such trapping centers.

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